Multi-agent interface architecture for human-robot cooperation. - Yasushi Nakauchi; Toyoshi Okada; Nobuyuki Yamasaki; Yuichiro Anzai (ICRA, 1992)

A microprocessor with a 128-bit CPU, ten floating-point MAC's, four floating-point dividers, and an MPEG-2 decoder. - Masakazu Suzuoki; Ken Kutaragi; Toshiyuki Hiroi; Hidetaka Magoshi; Shin'ichi Okamoto; Masaaki Oka; Akio Ohba; Yasuyuki Yamamoto; Makoto Furuhashi; Masayoshi Tanaka; Teiji Yutaka; Toyoshi Okada; et al. (IEEE J. Solid State Circuits, 1999)

2.44-GFLOPS 300-MHz floating-point vector-processing unit for high-performance 3D graphics computing. - Nobuhiro Ide; Masashi Hirano; Yukio Endo; Shin-ichi Yoshioka; Hiroaki Murakami; Atsushi Kunimatsu; Toshinori Sato; Takayuki Kamei; Toyoshi Okada; Masakazu Suzuoki (IEEE J. Solid State Circuits, 2000)

Vector Unit Architecture for Emotion Synthesis. - Atsushi Kunimatsu; Nobuhiro Ide; Toshinori Sato; Yukio Endo; Hiroaki Murakami; Takayuki Kamei; Masashi Hirano; Fujio Ishihara; Haruyuki Tago; Masaaki Oka; Akio Ohba; Teiji Yutaka; et al. (IEEE Micro, 2000)