Automated Pathfinding tool chain for 3D-stacked integrated circuits: Practical case study. - Dragomir Milojevic; Trevor E. Carlson; Kris Croes; Riko Radojcic; Diana F. Ragett; Dirk Seynhaeve; Federico Angiolini; Geert Van der Plas; Paul Marchal (3DIC, 2009)

System-level power/performance evaluation of 3D stacked DRAMs for mobile applications. - Marco Facchini; Trevor E. Carlson; Anselme Vignon; Martin Palkovic; Francky Catthoor; Wim Dehaene; Luca Benini; Paul Marchal (DATE, 2009)

Generic Multiphase Software Pipelined Partial FFT on Instruction Level Parallel Architectures. - Min Li 001; David Novo; Bruno Bougard; Trevor E. Carlson; Liesbet Van der Perre; Francky Catthoor (IEEE Trans. Signal Process., 2009)

Evaluating Application Vulnerability to Soft Errors in Multi-level Cache Hierarchy. - Zhe Ma; Trevor E. Carlson; Wim Heirman; Lieven Eeckhout (Euro-Par Workshops (2), 2011)

Using cycle stacks to understand scaling bottlenecks in multi-threaded workloads. - Wim Heirman; Trevor E. Carlson; Shuai Che; Kevin Skadron; Lieven Eeckhout (IISWC, 2011)

Using Fast and Accurate Simulation to Explore Hardware/Software Trade-offs in the Multi-Core Era. - Wim Heirman; Trevor E. Carlson; Souradip Sarkar; Pieter Ghysels; Wim Vanroose; Lieven Eeckhout (PARCO, 2011)

Sniper: exploring the level of abstraction for scalable and accurate parallel multi-core simulation. - Trevor E. Carlson; Wim Heirman; Lieven Eeckhout (SC, 2011)

Power-aware multi-core simulation for early design stage hardware/software co-optimization. - Wim Heirman; Souradip Sarkar; Trevor E. Carlson; Ibrahim Hur; Lieven Eeckhout (PACT, 2012)

Sampled simulation of multi-threaded applications. - Trevor E. Carlson; Wim Heirman; Lieven Eeckhout (ISPASS, 2013)

Node Performance and Energy Analysis with the Sniper Multi-core Simulator. - Trevor E. Carlson; Wim Heirman; Kenzo Van Craeynest; Lieven Eeckhout (Parallel Tools Workshop, 2013)

PCantorSim: Accelerating parallel architecture simulation through fractal-based sampling. - Chuntao Jiang; Zhibin Yu 001; Hai Jin 001; Cheng-Zhong Xu 001; Lieven Eeckhout; Wim Heirman; Trevor E. Carlson; Xiaofei Liao (ACM Trans. Archit. Code Optim., 2013)

Undersubscribed threading on clustered cache architectures. - Wim Heirman; Trevor E. Carlson; Kenzo Van Craeynest; Ibrahim Hur; Aamer Jaleel; Lieven Eeckhout (HPCA, 2014)

Automatic SMT threading for OpenMP applications on the Intel Xeon Phi co-processor. - Wim Heirman; Trevor E. Carlson; Kenzo Van Craeynest; Ibrahim Hur; Aamer Jaleel; Lieven Eeckhout (ROSS@ICS, 2014)

BarrierPoint: Sampled simulation of multi-threaded applications. - Trevor E. Carlson; Wim Heirman; Kenzo Van Craeynest; Lieven Eeckhout (ISPASS, 2014)

An Evaluation of High-Level Mechanistic Core Models. - Trevor E. Carlson; Wim Heirman; Stijn Eyerman; Ibrahim Hur; Lieven Eeckhout (ACM Trans. Archit. Code Optim., 2014)

Chrysso: an integrated power manager for constrained many-core processors. - Sudhanshu Shekhar Jha; Wim Heirman; Ayose Falcón; Trevor E. Carlson; Kenzo Van Craeynest; Jordi Tubella; Antonio González 001; Lieven Eeckhout (Conf. Computing Frontiers, 2015)

Full Speed Ahead: Detailed Architectural Simulation at Near-Native Speed. - Andreas Sandberg; Nikos Nikoleris; Trevor E. Carlson; Erik Hagersten; Stefanos Kaxiras; David Black-Schaffer (IISWC, 2015)

The load slice core microarchitecture. - Trevor E. Carlson; Wim Heirman; Osman Allam; Stefanos Kaxiras; Lieven Eeckhout (ISCA, 2015)

Micro-architecture independent analytical processor performance and power modeling. - Sam Van den Steen; Sander De Pestel; Moncef Mechri; Stijn Eyerman; Trevor E. Carlson; David Black-Schaffer; Erik Hagersten; Lieven Eeckhout (ISPASS, 2015)

Long term parking (LTP): criticality-aware resource allocation in OOO processors. - Andreas Sembrant; Trevor E. Carlson; Erik Hagersten; David Black-Schaffer; Arthur Perais; André Seznec; Pierre Michaud (MICRO, 2015)

Epoch Profiles: Microarchitecture-Based Application Analysis and Optimization. - Trevor E. Carlson; Siddharth Nilakantan; Mark Hempstead; Wim Heirman (IEEE Comput. Archit. Lett., 2015)

CoolSim: Eliminating traditional cache warming with fast, virtualized profiling. - Nikos Nikoleris; Andreas Sandberg; Erik Hagersten; Trevor E. Carlson (ISPASS, 2016)

CoolSim: Statistical techniques to replace cache warming with efficient, virtualized profiling. - Nikos Nikoleris; Andreas Sandberg; Erik Hagersten; Trevor E. Carlson (SAMOS, 2016)

Analytical Processor Performance and Power Modeling Using Micro-Architecture Independent Characteristics. - Sam Van den Steen; Stijn Eyerman; Sander De Pestel; Moncef Mechri; Trevor E. Carlson; David Black-Schaffer; Erik Hagersten; Lieven Eeckhout (IEEE Trans. Computers, 2016)

POSTER: Putting the G back into GPU/CPU Systems Research. - Andreas Sembrant; Trevor E. Carlson; Erik Hagersten; David Black-Schaffer (PACT, 2017)

Exploring the Performance Limits of Out-of-order Commit. - Mehdi Alipour; Trevor E. Carlson; Stefanos Kaxiras (Conf. Computing Frontiers, 2017)

Clairvoyance: look-ahead compile-time scheduling. - Kim-Anh Tran; Trevor E. Carlson; Konstantinos Koukos; Magnus Själander; Vasileios Spiliopoulos 001; Stefanos Kaxiras; Alexandra Jimborean (CGO, 2017)

Analyzing graphics workloads on tile-based GPUs. - Germán Ceballos; Andreas Sembrant; Trevor E. Carlson; David Black-Schaffer (IISWC, 2017)

A graphics tracing framework for exploring CPU+GPU memory systems. - Andreas Sembrant; Trevor E. Carlson; Erik Hagersten; David Black-Schaffer (IISWC, 2017)

Non-Speculative Load-Load Reordering in TSO. - Alberto Ros 001; Trevor E. Carlson; Mehdi Alipour; Stefanos Kaxiras (ISCA, 2017)

A taxonomy of out-of-order instruction commit. - Mehdi Alipour; Trevor E. Carlson; Stefanos Kaxiras (ISPASS, 2017)

Transcending Hardware Limits with Software Out-of-Order Processing. - Trevor E. Carlson; Kim-Anh Tran; Alexandra Jimborean; Konstantinos Koukos; Magnus Själander; Stefanos Kaxiras (IEEE Comput. Archit. Lett., 2017)

Behind the Scenes: Memory Analysis of Graphical Workloads on Tile-Based GPUs. - Germán Ceballos; Andreas Sembrant; Trevor E. Carlson; David Black-Schaffer (ISPASS, 2018)

SWOOP: software-hardware co-design for non-speculative, execute-ahead, in-order cores. - Kim-Anh Tran; Alexandra Jimborean; Trevor E. Carlson; Konstantinos Koukos; Magnus Själander; Stefanos Kaxiras (PLDI, 2018)

Active Learning to Develop Key Research Skills in Master's Level Computer Science Coursework. - Stephanie L. Hepner; Trevor E. Carlson (TALE, 2018)

Power-performance tradeoffs in data center servers: DVFS, CPU pinning, horizontal, and vertical scaling. - Jakub Krzywda; Ahmed Ali-Eldin; Trevor E. Carlson; Per-Olov Östberg; Erik Elmroth (Future Gener. Comput. Syst., 2018)

Non-Speculative Load Reordering in Total Store Ordering. - Stefanos Kaxiras; Trevor E. Carlson; Mehdi Alipour; Alberto Ros 001 (IEEE Micro, 2018)

Static Instruction Scheduling for High Performance on Limited Hardware. - Kim-Anh Tran; Trevor E. Carlson; Konstantinos Koukos; Magnus Själander; Vasileios Spiliopoulos 001; Stefanos Kaxiras; Alexandra Jimborean (IEEE Trans. Computers, 2018)

Directed Statistical Warming through Time Traveling. - Nikos Nikoleris; Lieven Eeckhout; Erik Hagersten; Trevor E. Carlson (MICRO, 2019)

Sampled Simulation of Task-Based Programs. - Thomas Grass; Trevor E. Carlson; Alejandro Rico; Germán Ceballos; Eduard Ayguadé; Marc Casas; Miquel Moretó (IEEE Trans. Computers, 2019)

Maximizing Limited Resources: a Limit-Based Study and Taxonomy of Out-of-Order Commit. - Mehdi Alipour; Trevor E. Carlson; David Black-Schaffer; Stefanos Kaxiras (J. Signal Process. Syst., 2019)

Laser Attack Benchmark Suite. - Burin Amornpaisannon; Andreas Diavastos; Li-Shiuan Peh; Trevor E. Carlson (ICCAD, 2020)

Secure Your SoC: Building System-an-Chip Designs for Security. - Shivam Bhasin; Trevor E. Carlson; Anupam Chattopadhyay; Vinay B. Y. Kumar; Avi Mendelson; Romain Poussier; Yaswanth Tavva (SoCC, 2020)

A Framework for Developing Critical Literacies in Computer Architecture Education. - Stephanie L. Hepner; Trevor E. Carlson (TALE, 2020)

PIM-GraphSCC: PIM-Based Graph Processing Using Graph's Community Structures. - Newton; Virendra Singh; Trevor E. Carlson (IEEE Comput. Archit. Lett., 2020)

You Only Spike Once: Improving Energy-Efficient Neuromorphic Inference to ANN-Level Accuracy. - Srivatsa P; Kyle Timothy Ng Chu; Yaswanth Tavva; Jibin Wu; Malu Zhang; Haizhou Li 001; Trevor E. Carlson (CoRR, 2020)

SOTERIA: In Search of Efficient Neural Networks for Private Inference. - Anshul Aggarwal; Trevor E. Carlson; Reza Shokri; Shruti Tople (CoRR, 2020)

CARGO : Context Augmented Critical Region Offload for Network-bound datacenter Workloads. - Siddharth Rai; Trevor E. Carlson (CoRR, 2020)

Agile and Open-Source Hardware. - Yungang Bao; Trevor E. Carlson (IEEE Micro, 2020)

NOREBA: a compiler-informed non-speculative out-of-order commit processor. - Ali Hajiabadi; Andreas Diavastos; Trevor E. Carlson (ASPLOS, 2021)

ELFies: Executable Region Checkpoints for Performance Analysis and Simulation. - Harish Patil; Alexander Isaev; Wim Heirman; Alen Sabu; Ali Hajiabadi; Trevor E. Carlson (CGO, 2021)

Ultra-Fast CGRA Scheduling to Enable Run Time, Programmable CGRAs. - Jinho Lee; Trevor E. Carlson (DAC, 2021)

Sentry-NoC: a statically-scheduled NoC for secure SoCs. - Ahmed Shalaby 001; Yaswanth Tavva; Trevor E. Carlson; Li-Shiuan Peh (NOCS, 2021)

Mitigating Power Attacks through Fine-Grained Instruction Reordering. - Yun Chen 004; Ali Hajiabadi; Romain Poussier; Andreas Diavastos; Shivam Bhasin; Trevor E. Carlson (CoRR, 2021)

Leaking Control Flow Information via the Hardware Prefetcher. - Yun Chen 004; Lingfeng Pei; Trevor E. Carlson (CoRR, 2021)

GraphWave: A Highly-Parallel Compute-at-Memory Graph Processing Accelerator. - Jinho Lee; Burin Amornpaisannon; Tulika Mitra; Trevor E. Carlson (DATE, 2022)

LoopPoint: Checkpoint-driven Sampled Simulation for Multi-threaded Applications. - Alen Sabu; Harish Patil; Wim Heirman; Trevor E. Carlson (HPCA, 2022)

Fast, Robust and Accurate Detection of Cache-Based Spectre Attack Phases. - Arash Pashrashid; Ali Hajiabadi; Trevor E. Carlson (ICCAD, 2022)

Elasticlave: An Efficient Memory Model for Enclaves. - Jason Zhijingcheng Yu; Shweta Shinde; Trevor E. Carlson; Prateek Saxena (USENIX Security Symposium, 2022)

A Cross-Prefetcher Schedule Optimization Methodology. - Razvan Nitu; Lingfeng Pei; Trevor E. Carlson (IEEE Access, 2022)

Multiply-and-Fire (MNF): An Event-driven Sparse Neural Network Accelerator. - Miao Yu; Tingting Xiang; Venkata Pavan Kumar Miriyala; Trevor E. Carlson (CoRR, 2022)

Rectified Linear Postsynaptic Potential Function for Backpropagation in Deep Spiking Neural Networks. - Malu Zhang; Jiadong Wang; Jibin Wu; Ammar Belatreche; Burin Amornpaisannon; Zhixuan Zhang; Venkata Pavan Kumar Miriyala; Hong Qu; Yansong Chua; Trevor E. Carlson; Haizhou Li 001 (IEEE Trans. Neural Networks Learn. Syst., 2022)

Efficient Instruction Scheduling Using Real-time Load Delay Tracking. - Andreas Diavastos; Trevor E. Carlson (ACM Trans. Comput. Syst., 2022)

AfterImage: Leaking Control Flow Data and Tracking Load Operations via the Hardware Prefetcher. - Yun Chen 004; Lingfeng Pei; Trevor E. Carlson (ASPLOS (2), 2023)

HidFix: Efficient Mitigation of Cache-Based Spectre Attacks Through Hidden Rollbacks. - Arash Pashrashid; Ali Hajiabadi; Trevor E. Carlson (ICCAD, 2023)

Photon: A Fine-grained Sampled Simulation Methodology for GPU Workloads. - Changxi Liu; Yifan Sun 002; Trevor E. Carlson (MICRO, 2023)

Capstone: A Capability-based Foundation for Trustless Secure Memory Access. - Jason Zhijingcheng Yu; Conrad Watt; Aditya Badole; Trevor E. Carlson; Prateek Saxena (USENIX Security Symposium, 2023)

3DRA: Dynamic Data-Driven Reconfigurable Architecture. - Jinho Lee; Burin Amornpaisannon; Andreas Diavastos; Trevor E. Carlson (IEEE Access, 2023)

Capstone: A Capability-based Foundation for Trustless Secure Memory Access (Extended Version). - Jason Zhijingcheng Yu; Conrad Watt; Aditya Badole; Trevor E. Carlson; Prateek Saxena (CoRR, 2023)

New Cross-Core Cache-Agnostic and Prefetcher-based Side-Channels and Covert-Channels. - Yun Chen 004; Ali Hajiabadi; Lingfeng Pei; Trevor E. Carlson (CoRR, 2023)

Mitigating Speculation-based Attacks through Configurable Hardware/Software Co-design. - Ali Hajiabadi; Archit Agarwal; Andreas Diavastos; Trevor E. Carlson (CoRR, 2023)

Multiply-and-Fire: An Event-Driven Sparse Neural Network Accelerator. - Miao Yu; Tingting Xiang; Venkata Pavan Kumar Miriyala; Trevor E. Carlson (ACM Trans. Archit. Code Optim., 2023)

Levioso: Efficient Compiler-Informed Secure Speculation. - Ali Hajiabadi; Archit Agarwal; Andreas Diavastos; Trevor E. Carlson (DAC, 2024)

Conjuring: Leaking Control Flow via Speculative Fetch Attacks. - Ali Hajiabadi; Trevor E. Carlson (DAC, 2024)

Prime+Reset: Introducing A Novel Cross-World Covert-Channel Through Comprehensive Security Analysis on ARM TrustZone. - Yun Chen 004; Arash Pashrashid; Yongzheng Wu; Trevor E. Carlson (DATE, 2024)

GADGETSPINNER: A New Transient Execution Primitive Using the Loop Stream Detector. - Yun Chen 004; Ali Hajiabadi; Trevor E. Carlson (HPCA, 2024)

PREFETCHX: Cross-Core Cache-Agnostic Prefetcher-based Side-Channel Attacks. - Yun Chen 004; Ali Hajiabadi; Lingfeng Pei; Trevor E. Carlson (HPCA, 2024)

Efficient Detection and Mitigation Schemes for Speculative Side Channels. - Arash Pashrashid; Ali Hajiabadi; Trevor E. Carlson (ISCAS, 2024)

FAST-GO: Fast, Accurate, and Scalable Hardware Trojan Detection using Graph Convolutional Networks. - Ali Imangholi; Mona Hashemi; Amirabbas Momeni; Siamak Mohammadi; Trevor E. Carlson (ISQED, 2024)

Viper: Utilizing Hierarchical Program Structure to Accelerate Multi-Core Simulation. - Alen Sabu; Changxi Liu; Trevor E. Carlson (IEEE Access, 2024)

Providing High-Performance Execution with a Sequential Contract for Cryptographic Programs. - Ali Hajiabadi; Trevor E. Carlson (CoRR, 2024)

Secure Run-Time Hardware Trojan Detection Using Lightweight Analytical Models. - Burin Amornpaisannon; Andreas Diavastos; Li-Shiuan Peh; Trevor E. Carlson (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

LOTUS: A Scalable Framework to Lock Multimodule Designs With One-Time Self-Destructing Key. - Mona Hashemi; Siamak Mohammadi; Trevor E. Carlson (IEEE Embed. Syst. Lett., 2024)

Pac-Sim: Simulation of Multi-threaded Workloads using Intelligent, Live Sampling. - Changxi Liu; Alen Sabu; Akanksha Chaudhari; Qingxuan Kang; Trevor E. Carlson (ACM Trans. Archit. Code Optim., 2024)

MDPeek: Breaking Balanced Branches in SGX with Memory Disambiguation Unit Side Channels. - Chang Liu 117; Shuaihu Feng; Yuan Li 061; Dongsheng Wang 002; Wenjian He; Yongqiang Lyu 001; Trevor E. Carlson (ASPLOS (2), 2025)

Cassandra: Efficient Enforcement of Sequential Execution for Cryptographic Programs. - Ali Hajiabadi; Trevor E. Carlson (ISCA, 2025)

The Sparsity-Aware LazyGPU Architecture. - Changxi Liu; Miao Yu; Yifan Sun 002; Trevor E. Carlson (ISCA, 2025)

Fully Randomized Pointers. - Sai Dhawal Phaye; Gregory J. Duck; Roland H. C. Yap; Trevor E. Carlson (ISMM, 2025)

Caplification: Bridging Capability-Aware and Capability-Oblivious Software. - Jason Zhijingcheng Yu; Mingkai Li; Aditya Badole; Trevor E. Carlson; Michael Swift; Prateek Saxena (SACMAT, 2025)

TOP: A Combined Logical and Physical Obfuscation Method for Securing Networks-on-Chip Against Reverse Engineering Attacks. - Mona Hashemi; Siamak Mohammadi; Trevor E. Carlson (IEEE Access, 2025)

SRLL: Improving Security and Reliability with User-Defined Constraint-Aware Logic Locking. - Mona Hashemi; Siamak Mohammadi; Trevor E. Carlson (ACM J. Emerg. Technol. Comput. Syst., 2025)

Anvil: A General-Purpose Timing-Safe Hardware Description Language. - Jason Zhijingcheng Yu; Aditya Ranjan Jha; Umang Mathur 001; Trevor E. Carlson; Prateek Saxena (CoRR, 2025)

PARADISE: Criticality-Aware Instruction Reordering for Power Attack Resistance. - Yun Chen 004; Ali Hajiabadi; Romain Poussier; Yaswanth Tavva; Andreas Diavastos; Shivam Bhasin; Trevor E. Carlson (ACM Trans. Archit. Code Optim., 2025)

CTScan: A CGRA-based Platform for the Emulation of Power Side-Channel Attacks on Edge CPUs. - Yaswanth Tavva; Rohan Juneja; Trevor E. Carlson; Li-Shiuan Peh (ACM Trans. Reconfigurable Technol. Syst., 2025)

Securing Mixed Rust with Hardware Capabilities. - Jason Zhijingcheng Yu; Fangqi Han; Kaustab Choudhury; Trevor E. Carlson; Prateek Saxena (CoRR, 2025)