Object-Oriented Technology Transfer to Multiprocessor System-Level Synthesis. - Pao-Ann Hsiung; Trong-Yen Lee; Sao-Jie Chen (TOOLS (24), 1997)

ICOS: an intelligent concurrent object-oriented synthesis methodology for multiprocessor systems. - Pao-Ann Hsiung; Chung-Hwang Chen; Trong-Yen Lee; Sao-Jie Chen (ACM Trans. Design Autom. Electr. Syst., 1998)

A Case Study in Hardware-Software Codesign of Distributed Systems - Vehicle Parking Management System. - Trong-Yen Lee; Pao-Ann Hsiung; Sao-Jie Chen (PDPTA, 1999)

Formal Verification of Embedded Real-Time Software in Component-Based Application Frameworks. - Pao-Ann Hsiung; Win-Bin See; Trong-Yen Lee; Jih-Ming Fu; Sao-Jie Chen (APSEC, 2001)

Formal Synthesis and Code Generation of Real-Time Embedded Software using Time-Extended Quasi-Static Scheduling. - Pao-Ann Hsiung; Trong-Yen Lee; Feng-Shi Su (APSEC, 2002)

TCN: Scalable Hierarchical Hypercubes. - Trong-Yen Lee; Pao-Ann Hsiung; Sao-Jie Chen (ICPADS, 2002)

VERTAF: An Object-Oriented Application Framework for Embedded Real-Time Systems. - Pao-Ann Hsiung; Trong-Yen Lee; Win-Bin See; Jih-Ming Fu; Sao-Jie Chen (Symposium on Object-Oriented Real-Time Distributed Computing, 2002)

Quasi-Dynamic Scheduling for the Synthesis of Real-Time Embedded Software with Local and Global Deadlines. - Pao-Ann Hsiung; Cheng-Yi Lin; Trong-Yen Lee (RTCSA, 2003)

RESS: Real-Time Embedded Software Synthesis and Prototyping Methodology. - Trong-Yen Lee; Pao-Ann Hsiung; I-Mu Wu; Feng-Shi Su (RTCSA, 2003)

Software Platform for Embedded Software Development. - Win-Bin See; Pao-Ann Hsiung; Trong-Yen Lee; Sao-Jie Chen (RTCSA, 2003)

RCGES: Retargetable Code Generation for Embedded Systems. - Trong-Yen Lee; Yang-Hsin Fan; Tsung-Hsun Yang; Chia-Chun Tsai; Wen-Ta Lee; Yuh-Shyan Hwang (ATVA, 2004)

Embedded software synthesis and prototyping. - Trong-Yen Lee; Pao-Ann Hsiung (IEEE Trans. Consumer Electron., 2004)

VERTAF: An Application Framework for the Design and Verification of Embedded Real-Time Software. - Pao-Ann Hsiung; Shang-Wei Lin 001; Chih-Hao Tseng; Trong-Yen Lee; Jih-Ming Fu; Win-Bin See (IEEE Trans. Software Eng., 2004)

Zero-Skew Driven for RLC Clock Tree Construction in SoC. - Chia-Chun Tsai; Jan-Ou Wu; Chung-Chieh Kuo; Trong-Yen Lee; Wen-Ta Lee (ICITA (1), 2005)

A new CCII-based pipelined analog to digital converter. - Yuh-Shyan Hwang; Lu-Po Liao; Chia-Chun Tsai; Wen-Ta Lee; Trong-Yen Lee; Jiann-Jong Chen (ISCAS (6), 2005)

A new low-power turbo decoder using HDA-DHDD stopping iteration. - Wen-Ta Lee; San-Ho Lin; Chia-Chun Tsai; Trong-Yen Lee; Yuh-Shyan Hwang (ISCAS (2), 2005)

SESAG: an object-oriented application framework for real-time systems. - Pao-Ann Hsiung; Trong-Yen Lee; Jih-Ming Fu; Win-Bin See (Softw. Pract. Exp., 2005)

Propagation Delay Minimization on RLC-Based Bus with Repeater Insertion. - Chia-Chun Tsai; Jan-Ou Wu; Trong-Yen Lee; Rong-Shue Hsiao (APCCAS, 2006)

Tapping Point Numerical-Based Search for Exact Zero-Skew RLC Clock Tree Construction. - Chia-Chun Tsai; Jan-Ou Wu; Yu-Ting Shieh; Chung-Chieh Kuo; Trong-Yen Lee (APCCAS, 2006)

Reduction of RLC Tree Delay Using Bidirectional Buffer Repeater Insertion. - Trong-Yen Lee; Yang-Hsin Fan; Chia-Chun Tsai (ICICIC (2), 2006)

A single chip image sensor embedded smooth spatial filter with A/D conversion. - Chia-Chun Tsai; Huang-Chi Chou; Trong-Yen Lee; Rong-Shue Hsiao (ISCAS, 2006)

Coupling aware RLC-based clock routings for crosstalk minimization. - Chia-Chun Tsai; Jan-Ou Wu; Chien-Wen Kao; Trong-Yen Lee; Rong-Shue Hsiao (ISCAS, 2006)

Using Stack Reconstruction on RTL Orthogonal Scan Chain Design. - Chia-Chun Tsai; Hann-Cheng Huang; Trong-Yen Lee; Wen-Ta Lee; Jan-Ou Wu (J. Inf. Sci. Eng., 2006)

Enhancement of Hardware-Software Partition for Embedded Multiprocessor FPGA Systems. - Trong-Yen Lee; Yang-Hsin Fan; Yu-Min Cheng; Chia-Chun Tsai; Rong-Shue Hsiao (IIH-MSP, 2007)

An Efficiently Hardware-Software Partitioning for Embedded Multiprocessor FPGA Systems. - Trong-Yen Lee; Yang-Hsin Fan; Yu-Min Cheng; Chia-Chun Tsai; Rong-Shue Hsiao (IMECS, 2007)

Zero-Skew Driven Buffered RLC Clock Tree Construction. - Jan-Ou Wu; Chia-Chun Tsai; Chung-Chieh Kuo; Trong-Yen Lee (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

Layer assignment considering manufacturability in X-architecture clock tree. - Chia-Chun Tsai; Wei-Shi Lin; Jan-Ou Wu; Chung-Chieh Kuo; Trong-Yen Lee (CIT, 2008)

X-clock routing based on pattern matching. - Chia-Chun Tsai; Chung-Chieh Kuo; Jan-Ou Wu; Trong-Yen Lee; Rong-Shue Hsiao (SoCC, 2008)

GDME: Grey Relational Clustering Applied to a Clock Tree Construction with Zero Skew and Minimal Delay. - Chia-Chun Tsai; Jan-Ou Wu; Trong-Yen Lee (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008)

Maximal Delay Reduction for RLC-Based Multi-Source Multi-Sink Bus with Repeater Insertion. - Chia-Chun Tsai; Jan-Ou Wu; Trong-Yen Lee (Circuits Syst. Signal Process., 2009)

A Bisection-Based Power Reduction Design for CMOS Flash Analog-to-Digital converters. - Chia-Chun Tsai; Kai-Wei Hong; Trong-Yen Lee (J. Circuits Syst. Comput., 2009)

The Design of a Li-ion Battery Charger Based on Multimode LDO Technology. - Chia-Chun Tsai; Chin-Yen Lin; Yuh-Shyan Hwang; Trong-Yen Lee (J. Circuits Syst. Comput., 2009)

Double-via insertion enhanced X-architecture clock routing for reliability. - Chia-Chun Tsai; Chung-Chieh Kuo; Lin-Jeng Gu; Trong-Yen Lee (ISCAS, 2010)

Antenna Violation Avoidance/Fixing for X-clock routing. - Chia-Chun Tsai; Chung-Chieh Kuo; Lin-Jeng Gu; Trong-Yen Lee (ISQED, 2010)

Hardware Context-Switch Methodology for Dynamically Partially Reconfigurable Systems. - Trong-Yen Lee; Che-Cheng Hu; Li-Wen Lai; Chia-Chun Tsai (J. Inf. Sci. Eng., 2010)

Post-Routing Double-Via Insertion for X-Architecture Clock Tree Yield Improvement. - Chia-Chun Tsai; Chung-Chieh Kuo; Trong-Yen Lee (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011)

Pattern-matching-based X-architecture zero-skew clock tree construction with X-Flip technique and via delay consideration. - Chung-Chieh Kuo; Chia-Chun Tsai; Trong-Yen Lee (Integr., 2011)

The RF Circuit Design of Power and Data Contactless Transmission for ISO/IEC 14443-2 Type B. - Chia-Chun Tsai; Sheng-Bin Dai; Trong-Yen Lee (J. Circuits Syst. Comput., 2011)

Micro fuel cell power management circuit design for portable devices. - Chia-Chun Tsai; Tsung-Ming Liu; Trong-Yen Lee (FSKD, 2012)

An Efficient Reconfigurable Architecture Design and Implementation of Image Contrast Enhancement Algorithm. - Wen-Chieh Chen; Shih-Chia Huang; Trong-Yen Lee (HPCC-ICESS, 2012)

Microcontroller based automatic parking system. - Trong-Yen Lee; Chi-Feng Lee (ICMLC, 2012)

Discharge-path-based antenna effect detection and fixing for X-architecture clock tree. - Chia-Chun Tsai; Chung-Chieh Kuo; Feng-Tzu Hsu; Trong-Yen Lee (Integr., 2012)

An Efficient Task Placement Method for Reconfigurable FPGA Systems. - Trong-Yen Lee; Nian-You Lin; Wei-Cheng Chen; Haixia Wu (CISIS, 2013)

Low Complexity Digit-Serial Multiplier over GF(2^m) Using Karatsuba Technology. - Trong-Yen Lee; Min-Jea Liu; Chia-Chen Fan; Chia-Chun Tsai; Haixia Wu (CISIS, 2013)

Energy-saving LED control module for agent-based Micro-Grid systems. - Trong-Yen Lee; Chi-Han Huang; Bo-Hao Wang; Cheng-Hsiu Kang; Jen-Yao Chen; I-Hsin Chou (ICCE-TW, 2014)

Design of Low-Complexity 4-Path Dynamic Reconfigurable MDC FFT Processor. - Trong-Yen Lee; Wei-Cheng Chen; Chi-Han Huang (ICS, 2014)

Design of Smart Power-Saving Architecture for Network on Chip. - Trong-Yen Lee; Chi-Han Huang (VLSI Design, 2014)

Power-saving dynamic allocati on strategy for clouding server. - Trong-Yen Lee; Kuang-Hua Chang; Chi-Han Huang; Cheng-Hsiu Kang; Min-Jea Liu (ICCE-TW, 2015)

Adaptive instruction codec architecture design for network-on-chip. - Trong-Yen Lee; Chi-Han Huang; Min-Jea Liu; Jhen-Syuan Chen (Comput. Electr. Eng., 2016)

A low-area dynamic reconfigurable MDC FFT processor design. - Trong-Yen Lee; Chi-Han Huang; Wei-Cheng Chen; Min-Jea Liu (Microprocess. Microsystems, 2016)

High performance CAN/FlexRay gateway design for in-vehicle network. - Trong-Yen Lee; Chia-Wei Kuo; I-An Lin (DSC, 2017)

A Reliability Scheduling Algorithm for the Static Segment of FlexRay on Vehicle Networks. - Trong-Yen Lee; I-An Lin; Jun-Jie Wang; Ju-Tse Tsai (Sensors, 2018)

Personalized ACC System for Smart Vehicles. - Trong-Yen Lee; Po-Hsuan Hung; Ju-Tse Tsai; I-An Lin (ICCE-TW, 2019)

A Comprehensive Teaching Reform Model for a Computer Networks Course Based on Integrated Information Systems. - Jingmin Yang; Trong-Yen Lee; Baoxing Chen; Wenjie Zhang 003 (Int. J. Emerg. Technol. Learn., 2019)

Design of a FlexRay/Ethernet Gateway and Security Mechanism for In-Vehicle Networks. - Trong-Yen Lee; I-An Lin; Ren-Hong Liao (Sensors, 2020)

Smart Cities in China: A Brief Overview. - Jingmin Yang; Trong-Yen Lee; Wenjie Zhang 003 (IT Prof., 2021)

Next-Generation Electronics and Sensing Technology. - Trong-Yen Lee; Yen-Lin Chen; Yu-Cheng Fan (Sensors, 2021)

High Efficiency Disease Detection for Potato Leaf with Convolutional Neural Network. - Trong-Yen Lee; I-An Lin; Jui-Yuan Yu; Jing-min Yang; Yu-Chun Chang (SN Comput. Sci., 2021)

A Design and Application of Municipal Service Platform Based on Cloud-Edge Collaboration for Smart Cities. - Jingmin Yang; Trong-Yen Lee; Wen-Ta Lee; Li Xu (Sensors, 2022)

Construction and Implementation of Wireless Network Online Learning System Based on Edge Computing. - Jingmin Yang; Trong-Yen Lee; Wen-Ta Lee; Li Xu (Int. J. Emerg. Technol. Learn., 2022)