Design and Implementation of a SoPC System for Speech Recognition. - Tran Van Hoang; Thien Truong Nguyen-Ly; Hoang Trang; Xuan-Tu Tran (MUE, 2013)

FPGA design of high throughput LDPC decoder based on imprecise Offset Min-Sum decoding. - Truong Nguyen-Ly; Khoa Le; Fakhreddine Ghaffari; Alexandru Amaricai; Oana Boncalo; Valentin Savin; David Declercq (NEWCAS, 2015)

Code-aware quantizer design for finite-precision min-sum decoders. - Zeina Mheich; Thien Truong Nguyen-Ly; Valentin Savin; David Declercq (BlackSeaCom, 2016)

Flexible, Cost-Efficient, High-Throughput Architecture for Layered LDPC Decoders with Fully-Parallel Processing Units. - Thien Truong Nguyen-Ly; Tushar Gupta; Manuel Pezzin; Valentin Savin; David Declercq; Sorin Cotofana (DSD, 2016)

Non-surjective finite alphabet iterative decoders. - Thien Truong Nguyen-Ly; Khoa Le; Valentin Savin; David Declercq; Fakhreddine Ghaffari; Oana Boncalo (ICC, 2016)

High Throughput FPGA Implementation for regular Non-Surjective Finite Alphabet Iterative Decoders. - Thien Truong Nguyen-Ly; Valentin Savin; Xavier Popon; David Declercq (ICC Workshops, 2017)

Efficient Hardware Implementations of LDPC Decoders, through Exploiting Impreciseness in Message-Passing Decoding Algorithms. (Mise en oeuvre matérielle de décodeurs LDPC haut débit, en exploitant la robustesse du décodage par passage de messages aux imprécisions de calcul). - Thien Truong Nguyen-Ly (2017)

Analysis and Design of Cost-Effective, High-Throughput LDPC Decoders. - Thien Truong Nguyen-Ly; Valentin Savin; Khoa Le; David Declercq; Fakhreddine Ghaffari; Oana Boncalo (IEEE Trans. Very Large Scale Integr. Syst., 2018)

High-Performance and Low-Complexity Decoding Algorithms for 5G Low-Density Parity-Check Codes. - Bich Ngoc Tran-Thi; Thien Truong Nguyen-Ly; Trang Hoang (J. Commun., 2022)