Design space exploration for minimizing multi-project wafer production cost. - Rung-Bin Lin; Meng-Chiou Wu; Wei-Chiu Tseng; Ming-Hsine Kuo; Tsai-Ying Lin; Shr-Cheng Tsai (ASP-DAC, 2006)

Double-via-driven standard cell library design. - Tsai-Ying Lin; Tsung-Han Lin; Hui-Hsiang Tung; Rung-Bin Lin (DATE, 2007)