A contamination aware droplet routing algorithm for digital microfluidic biochips. - Tsung-Wei Huang; Chun-Hsien Lin; Tsung-Yi Ho (ICCAD, 2009)

A fast routability- and performance-driven droplet routing algorithm for digital microfluidic biochips. - Tsung-Wei Huang; Tsung-Yi Ho (ICCD, 2009)

A network-flow based pin-count aware routing algorithm for broadcast electrode-addressing EWOD chips. - Tsung-Wei Huang; Shih-Yuan Yeh; Tsung-Yi Ho (ICCAD, 2010)

A two-stage ILP-based droplet routing algorithm for pin-constrained digital microfluidic biochips. - Tsung-Wei Huang; Tsung-Yi Ho (ISPD, 2010)

A Contamination Aware Droplet Routing Algorithm for the Synthesis of Digital Microfluidic Biochips. - Tsung-Wei Huang; Chun-Hsien Lin; Tsung-Yi Ho (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Progressive network-flow based power-aware broadcast addressing for pin-constrained digital microfluidic biochips. - Tsung-Wei Huang; Hong-Yan Su; Tsung-Yi Ho (DAC, 2011)

Reliability-oriented broadcast electrode-addressing for pin-constrained digital microfluidic biochips. - Tsung-Wei Huang; Tsung-Yi Ho; Krishnendu Chakrabarty (ICCAD, 2011)

A SAT-based routing algorithm for cross-referencing biochips. - Ping-Hung Yuh; Cliff Chiung-Yu Lin; Tsung-Wei Huang; Tsung-Yi Ho; Chia-Lin Yang; Yao-Wen Chang (SLIP, 2011)

Recent research and emerging challenges in design and optimization for digital microfluidic biochips. - Tsung-Wei Huang; Yan-You Lin; Jia-Wen Chang; Tsung-Yi Ho (SoCC, 2011)

A Two-Stage Integer Linear Programming-Based Droplet Routing Algorithm for Pin-Constrained Digital Microfluidic Biochips. - Tsung-Wei Huang; Tsung-Yi Ho (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

A Network-Flow Based Pin-Count Aware Routing Algorithm for Broadcast-Addressing EWOD Chips. - Tsung-Wei Huang; Shih-Yuan Yeh; Tsung-Yi Ho (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

An ILP-based obstacle-avoiding routing algorithm for pin-constrained EWOD chips. - Jia-Wen Chang; Tsung-Wei Huang; Tsung-Yi Ho (ASP-DAC, 2012)

Voltage-aware chip-level design for reliability-driven pin-constrained EWOD chips. - Sheng-Han Yeh; Jia-Wen Chang; Tsung-Wei Huang; Tsung-Yi Ho (ICCAD, 2012)

Integrated fluidic-chip co-design methodology for digital microfluidic biochips. - Tsung-Wei Huang; Jia-Wen Chang; Tsung-Yi Ho (ISPD, 2012)

Integrated Fluidic-Chip Co-Design Methodology for Digital Microfluidic Biochips. - Jia-Wen Chang; Sheng-Han Yeh; Tsung-Wei Huang; Tsung-Yi Ho (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

An ILP-Based Routing Algorithm for Pin-Constrained EWOD Chips With Obstacle Avoidance. - Jia-Wen Chang; Sheng-Han Yeh; Tsung-Wei Huang; Tsung-Yi Ho (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

A Reliability-Oriented Placement Algorithm for Reconfigurable Digital Microfluidic Biochips Using 3-D Deferred Decision Making Technique. - Ying-Han Chen; Chung-Lun Hsu; Li-Chen Tsai; Tsung-Wei Huang; Tsung-Yi Ho (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Fast path-based timing analysis for CPPR. - Tsung-Wei Huang; Pei-Ci Wu; Martin D. F. Wong (ICCAD, 2014)

UI-timer: an ultra-fast clock network pessimism removal algorithm. - Tsung-Wei Huang; Pei-Ci Wu; Martin D. F. Wong (ICCAD, 2014)

UI-route: An ultra-fast incremental maze routing algorithm. - Tsung-Wei Huang; Pei-Ci Wu; Martin D. F. Wong (SLIP, 2014)

Voltage-Aware Chip-Level Design for Reliability-Driven Pin-Constrained EWOD Chips. - Sheng-Han Yeh; Jia-Wen Chang; Tsung-Wei Huang; Shang-Tsung Yu; Tsung-Yi Ho (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

OpenTimer: A High-Performance Timing Analysis Tool. - Tsung-Wei Huang; Martin D. F. Wong (ICCAD, 2015)

Accelerated Path-Based Timing Analysis with MapReduce. - Tsung-Wei Huang; Martin D. F. Wong (ISPD, 2015)

On fast timing closure: speeding up incremental path-based timing analysis with mapreduce. - Tsung-Wei Huang; Martin D. F. Wong (SLIP, 2015)

A distributed timing analysis framework for large designs. - Tsung-Wei Huang; Martin D. F. Wong; Debjit Sinha; Kerim Kalafala; Natesan Venkateswaran (DAC, 2016)

Chute based automated fish length measurement and water drop detection. - Tsung-Wei Huang; Jenq-Neng Hwang; Craig S. Rose (ICASSP, 2016)

Live Tracking of Rail-Based Fish Catching on Wild Sea Surface. - Tsung-Wei Huang; Jenq-Neng Hwang; Suzanne Romain; Farron Wallace (CVAUI@ICPR, 2016)

UI-Timer 1.0: An Ultrafast Path-Based Timing Analysis Algorithm for CPPR. - Tsung-Wei Huang; Martin D. F. Wong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

LibAbs: An Efficient and Accurate Timing Macro-Modeling Algorithm for Large Hierarchical Designs. - Tin-Yin Lai; Tsung-Wei Huang; Martin D. F. Wong (DAC, 2017)

DtCraft: A distributed execution engine for compute-intensive applications. - Tsung-Wei Huang; Chun-Xun Lin; Martin D. F. Wong (ICCAD, 2017)

Distributed timing analysis - Tsung-Wei Huang (2017)

MtDetector: A High-performance Marine Traffic Detector at Stream Scale. - Chun-Xun Lin; Tsung-Wei Huang; Guannan Guo; Martin D. F. Wong (DEBS, 2018)

A Distributed Power Grid Analysis Framework from Sequential Stream Graph. - Chun-Xun Lin; Tsung-Wei Huang; Ting Yu 007; Martin D. F. Wong (ACM Great Lakes Symposium on VLSI, 2018)

Routing at compile time. - Chun-Xun Lin; Tsung-Wei Huang; Martin D. F. Wong (ISQED, 2018)

A General-purpose Distributed Programming System using Data-parallel Streams. - Tsung-Wei Huang; Chun-Xun Lin; Guannan Guo; Martin D. F. Wong (ACM Multimedia, 2018)

Multi-Camera Tracking of Vehicles based on Deep Features Re-ID and Trajectory-Based Camera Link Models. - Hung-Min Hsu; Tsung-Wei Huang; Gaoang Wang; Jiarui Cai; Zhichao Lei; Jenq-Neng Hwang (CVPR Workshops, 2019)

Multi-View Vehicle Re-Identification using Temporal Attention Model and Metadata Re-ranking. - Tsung-Wei Huang; Jiarui Cai; Hao Yang 018; Hung-Min Hsu; Jenq-Neng Hwang (CVPR Workshops, 2019)

Essential Building Blocks for Creating an Open-source EDA Project. - Tsung-Wei Huang; Chun-Xun Lin; Guannan Guo; Martin D. F. Wong (DAC, 2019)

Distributed Timing Analysis at Scale. - Tsung-Wei Huang; Chun-Xun Lin; Martin D. F. Wong (DAC, 2019)

A General Cache Framework for Efficient Generation of Timing Critical Paths. - Kuan-Ming Lai; Tsung-Wei Huang; Tsung-Yi Ho (DAC, 2019)

An Efficient and Composable Parallel Task Programming Library. - Chun-Xun Lin; Tsung-Wei Huang; Guannan Guo; Martin D. F. Wong (HPEC, 2019)

Recognizing Fish Species Captured Live on Wild Sea Surface in Videos by Deep Metric Learning with a Temporal Constraint. - Tsung-Wei Huang; Jenq-Neng Hwang; Suzanne Romain; Farron Wallace (ICIP, 2019)

Cpp-Taskflow: Fast Task-Based Parallel Programming Using Modern C++. - Tsung-Wei Huang; Chun-Xun Lin; Guannan Guo; Martin D. F. Wong (IPDPS, 2019)

A Modern C++ Parallel Task Programming Library. - Chun-Xun Lin; Tsung-Wei Huang; Guannan Guo; Martin D. F. Wong (ACM Multimedia, 2019)

DtCraft: A High-Performance Distributed Execution Engine at Scale. - Tsung-Wei Huang; Chun-Xun Lin; Martin D. F. Wong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Fish Tracking and Segmentation From Stereo Videos on the Wild Sea Surface for Electronic Monitoring of Rail Fishing. - Tsung-Wei Huang; Jenq-Neng Hwang; Suzanne Romain; Farron Wallace (IEEE Trans. Circuits Syst. Video Technol., 2019)

An Efficient Critical Path Generation Algorithm Considering Extensive Path Constraints. - Guannan Guo; Tsung-Wei Huang; Chun-Xun Lin; Martin D. F. Wong (DAC, 2020)

A Novel Inference Algorithm for Large Sparse Neural Network using Task Graph Parallelism. - Dian-Lun Lin; Tsung-Wei Huang (HPEC, 2020)

GPU-Accelerated Static Timing Analysis. - Zizheng Guo; Tsung-Wei Huang; Yibo Lin (ICCAD, 2020)

A General-purpose Parallel and Heterogeneous Task Programming System for VLSI CAD. - Tsung-Wei Huang (ICCAD, 2020)

Overview of 2020 CAD Contest at ICCAD. - Ing-Chao Lin; Ulf Schlichtmann; Tsung-Wei Huang; Mark Po-Hung Lin (ICCAD, 2020)

An Efficient Work-Stealing Scheduler for Task Dependency Graph. - Chun-Xun Lin; Tsung-Wei Huang; Martin D. F. Wong (ICPADS, 2020)

Programming Systems for Parallelizing VLSI CAD and Beyond. - Tsung-Wei Huang (VLSI-DAT, 2020)

Cpp-Taskflow v2: A General-purpose Parallel and Heterogeneous Task Programming System at Scale. - Tsung-Wei Huang; Dian-Lun Lin; Yibo Lin; Chun-Xun Lin (CoRR, 2020)

Mermin's inequalities of multiple qubits with orthogonal measurements on IBM Q 53-qubit system. - Wei-Jia Huang; Wei-Chen Chien; Chien-Hung Cho; Che-Chun Huang; Tsung-Wei Huang; Ching-Ray Chang (Quantum Eng., 2020)

ATM: A High Accuracy Extracted Timing Model for Hierarchical Timing Analysis. - Kuan-Ming Lai; Tsung-Wei Huang; Pei-Yu Lee; Tsung-Yi Ho (ASP-DAC, 2021)

A Provably Good and Practically Efficient Algorithm for Common Path Pessimism Removal in Large Designs. - Zizheng Guo; Tsung-Wei Huang; Yibo Lin (DAC, 2021)

GPU-accelerated Path-based Timing Analysis. - Guannan Guo; Tsung-Wei Huang; Yibo Lin; Martin D. F. Wong (DAC, 2021)

Taskflow-San: Sanitizing Erroneous Control Flow in Taskflow Graphs. - McKay Mower; Luke Majors; Tsung-Wei Huang (ESPM2@SC, 2021)

An Experimental Study of SYCL Task Graph Parallelism for Large-Scale Machine Learning Workloads. - Cheng-Hsiang Chiu; Dian-Lun Lin; Tsung-Wei Huang (Euro-Par Workshops, 2021)

Efficient GPU Computation Using Task Graph Parallelism. - Dian-Lun Lin; Tsung-Wei Huang (Euro-Par, 2021)

A High-Performance Heterogeneous Critical Path Analysis Framework. - Yasin Zamani; Tsung-Wei Huang (HPEC, 2021)

HeteroCPPR: Accelerating Common Path Pessimism Removal with Heterogeneous CPU-GPU Parallelism. - Zizheng Guo; Tsung-Wei Huang; Yibo Lin (ICCAD, 2021)

GPU-accelerated Critical Path Generation with Path Constraints. - Guannan Guo; Tsung-Wei Huang; Yibo Lin; Martin D. F. Wong (ICCAD, 2021)

Overview of 2021 CAD Contest at ICCAD. - Tsung-Wei Huang; Yu-Guang Chen; Chun-Yao Wang; Takashi Sato 001 (ICCAD, 2021)

Revertible Guidance Image Based Image Detail Enhancement. - Tsung-Wei Huang; Guan-Ming Su (ICIP, 2021)

TFProf: Profiling Large Taskflow Programs with Modern D3 and C++. - Tsung-Wei Huang (ProTools@SC, 2021)

Machine Learning System-Enabled GPU Acceleration for EDA. - Tsung-Wei Huang (VLSI-DAT, 2021)

OpenTimer v2: A Parallel Incremental Timing Analysis Engine. - Tsung-Wei Huang; Chun-Xun Lin; Martin D. F. Wong (IEEE Des. Test, 2021)

OpenTimer v2: A New Parallel Incremental Timing Analysis Engine. - Tsung-Wei Huang; Guannan Guo; Chun-Xun Lin; Martin D. F. Wong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Cpp-Taskflow: A General-Purpose Parallel Task Programming System at Scale. - Tsung-Wei Huang; Yibo Lin; Chun-Xun Lin; Guannan Guo; Martin D. F. Wong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Efficient Critical Paths Search Algorithm using Mergeable Heap. - Kexing Zhou; Zizheng Guo; Tsung-Wei Huang; Yibo Lin (ASP-DAC, 2022)

Efficient timing propagation with simultaneous structural and pipeline parallelisms: late breaking results. - Cheng-Hsiang Chiu; Tsung-Wei Huang (DAC, 2022)

Composing Pipeline Parallelism using Control Taskflow Graph. - Cheng-Hsiang Chiu; Tsung-Wei Huang (HPDC, 2022)

Enhancing the Performance Portability of Heterogeneous Circuit Analysis Programs. - Tsung-Wei Huang (HPEC, 2022)

Task-Parallel Programming with Constrained Parallelism. - Tsung-Wei Huang; Leslie Hwang (HPEC, 2022)

Overview of 2022 CAD Contest at ICCAD. - Yu-Guang Chen; Chun-Yao Wang; Tsung-Wei Huang; Takashi Sato 001 (ICCAD, 2022)

From RTL to CUDA: A GPU Acceleration Flow for RTL Simulation with Batch Stimulus. - Dian-Lun Lin; Haoxing Ren; Yanqing Zhang 002; Brucek Khailany; Tsung-Wei Huang (ICPP, 2022)

Concurrent CPU-GPU Task Programming using Modern C++. - Tsung-Wei Huang; Yibo Lin (IPDPS Workshops, 2022)

Pipeflow: An Efficient Task-Parallel Pipeline Programming Framework using Modern C++. - Cheng-Hsiang Chiu; Tsung-Wei Huang; Zizheng Guo; Yibo Lin (CoRR, 2022)

A Provably Good and Practically Efficient Algorithm for Common Path Pessimism Removal in Large Designs. - Zizheng Guo; Mingwei Yang 002; Tsung-Wei Huang; Yibo Lin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Taskflow: A General-Purpose Parallel and Heterogeneous Task Programming System. - Tsung-Wei Huang; Dian-Lun Lin; Yibo Lin; Chun-Xun Lin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Taskflow: A Lightweight Parallel and Heterogeneous Task Graph Computing System. - Tsung-Wei Huang; Dian-Lun Lin; Chun-Xun Lin; Yibo Lin (IEEE Trans. Parallel Distributed Syst., 2022)

Accelerating Large Sparse Neural Network Inference Using GPU Task Graph Parallelism. - Dian-Lun Lin; Tsung-Wei Huang (IEEE Trans. Parallel Distributed Syst., 2022)

Neural Segmentation Field in 3D Scene. - Tsung-Wei Huang; Peihan Tu; Guan-Ming Su (ACSSC, 2023)

GenFuzz: GPU-accelerated Hardware Fuzzing using Genetic Algorithm with Multiple Inputs. - Dian-Lun Lin; Yanqing Zhang 002; Haoxing Ren; Brucek Khailany; Shih-Hsin Wang; Tsung-Wei Huang (DAC, 2023)

Fast STA Graph Partitioning Framework for Multi-GPU Acceleration. - Guannan Guo; Tsung-Wei Huang; Martin D. F. Wong (DATE, 2023)

uSAP: An Ultra-Fast Stochastic Graph Partitioner. - Chih-Chun Chang; Tsung-Wei Huang (HPEC, 2023)

GLARE: Accelerating Sparse DNN Inference Kernels with Global Memory Access Reduction. - Shui Jiang; Tsung-Wei Huang; Tsung-Yi Ho (HPEC, 2023)

Invited Paper: Programming Dynamic Task Parallelism for Heterogeneous EDA Algorithms. - Cheng-Hsiang Chiu; Dian-Lun Lin; Tsung-Wei Huang (ICCAD, 2023)

Invited Paper: Overview of 2023 CAD Contest at ICCAD. - Takashi Sato 001; Chun-Yao Wang; Yu-Guang Chen; Tsung-Wei Huang (ICCAD, 2023)

Film Grain Removal Using Metadata. - Tsung-Wei Huang; Guan-Ming Su; Peng Yin 002 (ICIP, 2023)

SNICIT: Accelerating Sparse Neural Network Inference via Compression at Inference Time on GPU. - Shui Jiang; Tsung-Wei Huang; Bei Yu 001; Tsung-Yi Ho (ICPP, 2023)

Parallel And-Inverter Graph Simulation Using a Task-graph Computing System. - Elmir Dzaka; Dian-Lun Lin; Tsung-Wei Huang (IPDPS Workshops, 2023)

qTask: Task-parallel Quantum Circuit Simulation with Incrementality. - Tsung-Wei Huang (IPDPS, 2023)

Taiwan Student Quantum Computer Society. - Ran-Yu Chang; Yu-Chao Hsu; Tsung-Wei Huang (QCE, 2023)

A Robust Hybrid Classical and Quantum Model for Short-Term Wind Speed Forecasting. - Ying-Yi Hong; Christine Joy E. Arce; Tsung-Wei Huang (IEEE Access, 2023)

A GPU-Accelerated Framework for Path-Based Timing Analysis. - Guannan Guo; Tsung-Wei Huang; Yibo Lin; Zizheng Guo; Sushma Yellapragada; Martin D. F. Wong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Accelerating Static Timing Analysis Using CPU-GPU Heterogeneous Parallelism. - Zizheng Guo; Tsung-Wei Huang; Yibo Lin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

A Resource-efficient Task Scheduling System using Reinforcement Learning : Invited Paper. - Chedi Morchdi; Cheng-Hsiang Chiu; Yi Zhou 017; Tsung-Wei Huang (ASPDAC, 2024)

Anytime Multi-Agent Path Finding using Operation Parallelism in Large Neighborhood Search. - Shao-Hung Chan; Zhe Chen 016; Dian-Lun Lin; Yue Zhang 048; Daniel Harabor; Sven Koenig; Tsung-Wei Huang; Thomy Phan (AAMAS, 2024)

Ink: Efficient Incremental k-Critical Path Generation. - Che Chang; Tsung-Wei Huang; Dian-Lun Lin; Guannan Guo; Shiju Lin (DAC, 2024)

G-kway: Multilevel GPU-Accelerated k-way Graph Partitioner. - Wan-Luan Lee; Dian-Lun Lin; Tsung-Wei Huang; Shui Jiang; Tsung-Yi Ho; Yibo Lin; Bei Yu 001 (DAC, 2024)

GCS-Timer: GPU-Accelerated Current Source Model Based Static Timing Analysis. - Shiju Lin; Guannan Guo; Tsung-Wei Huang; Weihua Sheng; Evangeline F. Y. Young; Martin D. F. Wong (DAC, 2024)

G-PASTA: GPU-Accelerated Partitioning Algorithm for Static Timing Analysis. - Boyang Zhang; Dian-Lun Lin; Che Chang; Cheng-Hsiang Chiu; Bojue Wang; Wan-Luan Lee; Chih-Chun Chang; Donghao Fang; Tsung-Wei Huang (DAC, 2024)

Heterogeneous Static Timing Analysis with Advanced Delay Calculator. - Zizheng Guo; Tsung-Wei Huang; Zhou Jin 001; Cheng Zhuo; Yibo Lin; Runsheng Wang; Ru Huang 001 (DATE, 2024)

The Multiplane Image Information SEI Message and its Use for Distribution of Volumetric Video with Conventional Codecs. - Taoran Lu; Peng Yin 002; Guan-Ming Su; Dae Yeol Lee; Tsung-Wei Huang; Sejin Oh; Sean McCarthy; Walt Husak; Gary J. Sullivan (DCC, 2024)

V-Trans4Style: Visual Transition Recommendation for Video Production Style Adaptation. - Pooja Guhan; Tsung-Wei Huang; Guan-Ming Su; Subhadra Gopalakrishnan; Dinesh Manocha (ECCV (80), 2024)

TaroRTL: Accelerating RTL Simulation Using Coroutine-Based Heterogeneous Task Graph Scheduling. - Dian-Lun Lin; Umit Ogras; Joshua San Miguel; Tsung-Wei Huang (Euro-Par (3), 2024)

An Efficient Task-Parallel Pipeline Programming Framework. - Cheng-Hsiang Chiu; Zhicheng Xiong; Zizheng Guo; Tsung-Wei Huang; Yibo Lin (HPC Asia, 2024)

Reinforcement Learning-Generated Topological Order for Dynamic Task Graph Scheduling. - Cheng-Hsiang Chiu; Chedi Morchdi; Yi Zhou 017; Boyang Zhang; Che Chang; Tsung-Wei Huang (HPEC, 2024)

HeteroExcept: A CPU-GPU Heterogeneous Algorithm to Accelerate Exception-aware Static Timing Analysis. - Zizheng Guo; Zuodong Zhang; Wuxi Li; Tsung-Wei Huang; Xizhe Shi; Yufan Du; Yibo Lin; Runsheng Wang; Ru Huang 001 (ICCAD, 2024)

GSAP: A GPU-Accelerated Stochastic Graph Partitioner. - Chih-Chun Chang; Boyang Zhang; Tsung-Wei Huang (ICPP, 2024)

FlatDD: A High-Performance Quantum Circuit Simulator using Decision Diagram and Flat Array. - Shui Jiang; Rongliang Fu; Lukas Burgholzer; Robert Wille; Tsung-Yi Ho; Tsung-Wei Huang (ICPP, 2024)

Parallel and Heterogeneous Timing Analysis: Partition, Algorithm, and System. - Tsung-Wei Huang; Boyang Zhang; Dian-Lun Lin; Cheng-Hsiang Chiu (ISPD, 2024)

Incremental Critical Path Generation for Dynamic Graphs. - Che Chang; Cheng-Hsiang Chiu; Boyang Zhang; Tsung-Wei Huang (ISVLSI, 2024)

An Experimental Study of Dynamic Task Graph Parallelism for Large-Scale Circuit Analysis Workloads. - Cheng-Hsiang Chiu; Tsung-Wei Huang (ISVLSI, 2024)

BatchSim: Parallel RTL Simulation Using Inter-Cycle Batching and Task Graph Parallelism. - Jie Tong; Liangliang Chang; Umit Yusuf Ogras; Tsung-Wei Huang (ISVLSI, 2024)

Text-Driven Synchronized Diffusion Video and Audio Talking Head Generation. - Zhenfei Zhang; Tsung-Wei Huang; Guan-Ming Su; Ming-Ching Chang; Xin Li 005 (MIPR, 2024)

Quantum Fourier Transform of Atrial Fibrillation. - Yu-Ching Chen; Chih-Yu Chen; Tsung-Wei Huang; Chia-Ho Ou (QCE, 2024)

PathGen: An Efficient Parallel Critical Path Generation Algorithm. - Che Chang; Boyang Zhang; Cheng-Hsiang Chiu; Dian-Lun Lin; Yi-Hua Chung; Wan-Luan Lee; Zizheng Guo; Yibo Lin; Tsung-Wei Huang (ASP-DAC, 2025)

HyperG: Multilevel GPU-Accelerated k-way Hypergraph Partitioner. - Wan-Luan Lee; Dian-Lun Lin; Cheng-Hsiang Chiu; Ulf Schlichtmann; Tsung-Wei Huang (ASP-DAC, 2025)

iTAP: An Incremental Task Graph Partitioner for Task-parallel Static Timing Analysis. - Boyang Zhang; Che Chang; Cheng-Hsiang Chiu; Dian-Lun Lin; Yang Sui; Chih-Chun Chang; Yi-Hua Chung; Wan-Luan Lee; Zizheng Guo; Yibo Lin; Tsung-Wei Huang (ASP-DAC, 2025)

BQSim: GPU-accelerated Batch Quantum Circuit Simulation using Decision Diagram. - Shui Jiang; Yi-Hua Chung; Chih-Chun Chang; Tsung-Yi Ho; Tsung-Wei Huang (ASPLOS (2), 2025)

SimPart: A Simple Yet Effective Replication-Aided Partitioning Algorithm for Logic Simulation on GPU. - Yi-Hua Chung; Shui Jiang; Wan-Luan Lee; Yanqing Zhang 002; Haoxing Ren; Tsung-Yi Ho; Tsung-Wei Huang (Euro-Par (3), 2025)

Scalable Code Generation for RTL Simulation of Deep Learning Accelerators With MLIR. - Jie Tong; Wan-Luan Lee; Umit Yusuf Ogras; Tsung-Wei Huang (Euro-Par (1), 2025)

An Efficient Implementation of Parallel Breadth-first Search. - Pao-I Chen; Tsung-Wei Huang (FCPC@PPOPP, 2025)

Gaussian Splatting: State-of-The-Arts and Future Trends. - Birendra Kathariya; Dae Yeol Lee; Tsung-Wei Huang; Tong Shao; Peng Yin 002; Guan-Ming Su (ICNC, 2025)

Parametric Shadow Control for Portrait Generationin Text-to-Image Diffusion Models. - Haoming Cai; Tsung-Wei Huang; Shiv Gehlot; Brandon Y. Feng; Sachin Shah; Guan-Ming Su; Christopher A. Metzler (CoRR, 2025)

CamMimic: Zero-Shot Image To Camera Motion Personalized Video Generation Using Diffusion Models. - Pooja Guhan; Divya Kothandaraman; Tsung-Wei Huang; Guan-Ming Su; Dinesh Manocha (CoRR, 2025)

SP2RINT: Spatially-Decoupled Physics-Inspired Progressive Inverse Optimization for Scalable, PDE-Constrained Meta-Optical Neural Network Training. - Pingchuan Ma 012; Ziang Yin; Qi Jing; Zhengqi Gao; Nicholas Gangi; Boyang Zhang; Tsung-Wei Huang; Zhaoran Rena Huang; Duane S. Boning; Yu Yao; Jiaqi Gu 002 (CoRR, 2025)