Highly Parallel Processor Array "PAX" for Wide Scientific Applications. - Tsutomu Hoshino; Tomonori Shirakawa; Takeshi Kamimura; Takahisa Kageyama; Kiyo Takenouchi; Hidehiko Abe; Satoshi Sekiguchi; Yoshio Oyanagi; Toshio Kawai (ICPP, 1983)

PACS: A Parallel Microprocessor Array for Scientific Calculations - Tsutomu Hoshino; Toshio Kawai; Tomonori Shirakawa; Jun'ichi Higashino; Akira Yamaoka; Hachidai Ito; Takashi Sato; Kazuo Sawada (ACM Trans. Comput. Syst., 1983)

Super Freedom Simulator PAX. - Tsutomu Hoshino; Tomonori Shirakawa; Yoshio Oyanagi; Kiyo Takenouchi; Toshio Kawai (VLSI Engineering, 1984)

Parallelized ADI Scheme Using GECR (Gauss-Elimination-Cyclic-Reduction) Method and Implementation of Navier-Stokes Equation in the PAX computer. - Tsutomu Hoshino; Takeshi Kamimura; Toshihiro Iida; Tomonori Shirakawa (ICPP, 1985)

An Invitation to the World of PAX. - Tsutomu Hoshino (Computer, 1986)

Mesh-connected parallel computer PAX for scientific applications. - Tsutomu Hoshino; Tomonori Shirakawa; Keiichi Tsuboi (Parallel Comput., 1987)

Mapping schemes of the particle-in-cell method implemented on the PAX computer. - Tsutomu Hoshino; Robert Hiromoto; Satoshi Sekiguchi; S. Majima (Parallel Comput., 1988)

Egrets of a Feather Flock Together. - Yukihiko Toquenaga; Isamu Kajitani; Tsutomu Hoshino (Artif. Life, 1994)

Variable Length Chromosome GA for Evolvable Hardware. - Isamu Kajitani; Tsutomu Hoshino; Masaya Iwata; Tetsuya Higuchi (International Conference on Evolutionary Computation, 1996)

A Field-Programmable Gate-Array System for Evolutionary Computation. - Tsutomu Maruyama; Terunobu Funatsu; Tsutomu Hoshino (FPL, 1998)

A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI. - Isamu Kajitani; Tsutomu Hoshino; Daisuke Nishikawa; Hiroshi Yokoi; Shogo Nakaya; Tsukasa Yamauchi; Takeshi Inuo; Nobuki Kajihara; Masaya Iwata; Didier Keymeulen; Tetsuya Higuchi (ICES, 1998)

Fractal Fitness Landscape and Loss of Robustness in Evolutionary Robot Navigation. - Tsutomu Hoshino; Daisuke Mitsumoto; Tohru Nagano (Auton. Robots, 1998)

An Evolvable Hardware Chip and Its Application as a Multi-Function Prosthetic Hand Controller. - Isamu Kajitani; Tsutomu Hoshino; Nobuki Kajihara; Masaya Iwata; Tetsuya Higuchi (AAAI/IAAI, 1999)

High Speed Hardware Computation of Co-evolution Models. - Yoshiki Yamaguchi; Tsutomu Maruyama; Tsutomu Hoshino (ECAL, 1999)

A Reconfigurable Architecture for High Speed Computation by Pipeline Processing. - Tsutomu Maruyama; Tsutomu Hoshino (FPL, 1999)

Hardware Implementation Techniques for Recursive Calls and Loops. - Tsutomu Maruyama; Masaaki Takagi; Tsutomu Hoshino (FPL, 1999)

A Shogi Processor with a Field Programmable Gate Array. - Yohei Hori; Minenobu Seki; Reijer Grimbergen; Tsutomu Maruyama; Tsutomu Hoshino (Computers and Games, 2000)

A C to HDL Compiler for Pipeline Processing on FPGAs. - Tsutomu Maruyama; Tsutomu Hoshino (FCCM, 2000)

High Speed Computation of Lattice gas Automata with FPFA. - Tomoyoshi Kobori; Tsutomu Maruyama; Tsutomu Hoshino (FPL, 2000)

A Co-processor System with a Virtex FPGA for Evolutionary Computation. - Yoshiki Yamaguchi; Akira Miyashita; Tsutomu Maruyama; Tsutomu Hoshino (FPL, 2000)

A Cellular Automata System with FPGA. - Tomoyoshi Kobori; Tsutomu Maruyama; Tsutomu Hoshino (FCCM, 2001)

A Music Synthesizer on FPGA. - Takashi Saito; Tsutomu Maruyama; Tsutomu Hoshino; Saburo Hirano (FPL, 2001)