Highly parallel residue arithmetic chip based on multiple-valued bidirectional current-mode logic. - Michitaka Kameyama; Tsutomu Sekibe; Tatsuo Higuchi 001 (IEEE J. Solid State Circuits, 1989)

A 45nm single-chip application-and-baseband processor using an intermittent operation technique. - Motoyasu Shirasaki; Yusaku Miyazaki; Masahiro Hoshaku; Hiroo Yamamoto; Sachio Ogawa; Takuya Arimura; Hiroshi Hirai; Yasuo Iizuka; Tsutomu Sekibe; Yoichi Nishida; Toshiyuki Ishioka; Junji Michiyama (ISSCC, 2009)

Cross-Layer adaptive power save control method for wireless local area networks. - Hirokazu Kobayashi; Masaaki Harada; Satoshi Senga; Kazushige Yamada; Junichro Soeda; Tsutomu Sekibe (WiMob, 2012)

Implementation of a RISC-V SMT Core in an AI processor. - Hidetaro Tanaka; Tomoaki Tanaka; Ryosuke Higashi; Tsutomu Sekibe; Shuichi Takada; Hironori Nakajo (SoICT, 2022)