Parallelized viterbi processor for 5, 000-word large-vocabulary real-time continuous speech recognition FPGA system. - Tsuyoshi Fujinaga; Kazuo Miura; Hiroki Noguchi; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (INTERSPEECH, 2009)

A 40 nm 144 mW VLSI processor for realtime 60 kWord continuous speech recognition. - Guangji He; Takanobu Sugahara; Tsuyoshi Fujinaga; Yuki Miyamoto; Hiroki Noguchi; Shintaro Izumi; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (CICC, 2011)

A Low-Power Real-Time SIFT Descriptor Generation Engine for Full-HDTV Video Recognition. - Kosuke Mizuno; Hiroki Noguchi; Guangji He; Yosuke Terachi; Tetsuya Kamino; Tsuyoshi Fujinaga; Shintaro Izumi; Yasuo Ariki; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (IEICE Trans. Electron., 2011)

VLSI Architecture of GMM Processing and Viterbi Decoder for 60, 000-Word Real-Time Continuous Speech Recognition. - Hiroki Noguchi; Kazuo Miura; Tsuyoshi Fujinaga; Takanobu Sugahara; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (IEICE Trans. Electron., 2011)

A 40 nm 144 mW VLSI Processor for Real-Time 60-kWord Continuous Speech Recognition. - Guangji He; Takanobu Sugahara; Yuki Miyamoto; Tsuyoshi Fujinaga; Hiroki Noguchi; Shintaro Izumi; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)