Low power full-search block-matching motion estimation chip for H.263+. - Jun-Fu Shen; Liang-Gee Chen; Hao-Chieh Chang; Tu-Chih Wang (ISCAS (4), 1999)

A programmable VLSI architecture for 2-D discrete wavelet transform. - Chien-Yu Chen 001; Zhong-Lan Yang; Tu-Chih Wang; Liang-Gee Chen (ISCAS, 2000)

A novel low-power full-search block-matching motion-estimation design for H.263+. - Jun-Fu Shen; Tu-Chih Wang; Liang-Gee Chen (IEEE Trans. Circuits Syst. Video Technol., 2001)

A Programmable Parallel VLSI Architecture for 2-D Discrete Wavelet Transform. - Chien-Yu Chen 001; Zhong-Lan Yang; Tu-Chih Wang; Liang-Gee Chen (J. VLSI Signal Process., 2001)

Real-time deblocking filter for MPEG-4 systems. - Hung-Chi Fang; Tu-Chih Wang; Liang-Gee Chen (APCCAS (1), 2002)

Low delay, error robust wireless video transmission architecture for video communication. - Tu-Chih Wang; Hung-Chi Fang; Liang-Gee Chen (ICME (1), 2002)

Low-delay and error-robust wireless video transmission for video communications. - Tu-Chih Wang; Hung-Chi Fang; Liang-Gee Chen (IEEE Trans. Circuits Syst. Video Technol., 2002)

Hardware oriented rate control algorithm and implementation for realtime video coding. - Hung-Chi Fang; Tu-Chih Wang; Yu-Wei Chang; Liang-Gee Chen (ICASSP (2), 2003)

Analysis and reduction of reference frames for motion estimation in MPEG-4 AVC/JVT/H.264. - Yu-Wen Huang; Bing-Yu Hsieh; Tu-Chih Wang; Shao-Yi Chien; Shyh-Yih Ma; Chun-Fu Shen; Liang-Gee Chen (ICASSP (3), 2003)

Performance analysis of hardware oriented algorithm modifications in H.264. - Tu-Chih Wang; Yu-Wen Huang; Hung-Chi Fang; Liang-Gee Chen (ICASSP (2), 2003)

Novel word-level algorithm of embedded block coding in JPEG 2000. - Hung-Chi Fang; Tu-Chih Wang; Yu-Wei Chang; Ya-Yun Shih; Liang-Gee Chen (ICME, 2003)

Architecture design for deblocking filter in H.264/JVT/AVC. - Yu-Wen Huang; To-Wei Chen; Bing-Yu Hsieh; Tu-Chih Wang; Te-Hao Chang; Liang-Gee Chen (ICME, 2003)

Performance analysis of hardware oriented algorithm modification in H.264. - Tu-Chih Wang; Yu-Wen Huang; Hung-Chi Fang; Liang-Gee Chen (ICME, 2003)

High speed memory efficient EBCOT architecture for JPEG2000. - Hung-Chi Fang; Tu-Chih Wang; Chung-Jr Lian; Te-Hao Chang; Liang-Gee Chen (ISCAS (2), 2003)

Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264. - Yu-Wen Huang; Tu-Chih Wang; Bing-Yu Hsieh; Liang-Gee Chen (ISCAS (2), 2003)

Parallel 4×4 2D transform and inverse transform architecture for MPEG-4 AVC/H.264. - Tu-Chih Wang; Yu-Wen Huang; Hung-Chi Fang; Liang-Gee Chen (ISCAS (2), 2003)

Fast motion estimation algorithm for H.264/MPEG-4 AVC by using multiple reference frame skipping criteria. - Bing-Yu Hsieh; Yu-Wen Huang; Tu-Chih Wang; Shao-Yi Chien; Liang-Gee Chen (VCIP, 2003)

Parallel embedded block coding architecture for JPEG 2000. - Hung-Chi Fang; Yu-Wei Chang; Tu-Chih Wang; Chung-Jr Lian; Liang-Gee Chen (IEEE Trans. Circuits Syst. Video Technol., 2005)

Analysis and architecture design of variable block-size motion estimation for H.264/AVC. - Ching-Yeh Chen; Shao-Yi Chien; Yu-Wen Huang; Tung-Chien Chen; Tu-Chih Wang; Liang-Gee Chen (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

High-Performance JPEG 2000 Encoder With Rate-Distortion Optimization. - Hung-Chi Fang; Yu-Wei Chang; Tu-Chih Wang; Chao-Tsung Huang; Liang-Gee Chen (IEEE Trans. Multim., 2006)