Improving Superscalar Instruction Dispatch and Issue by Exploiting Dynamic Code Sequences. - Sriram Vajapeyam; Tulika Mitra (ISCA, 1997)

A Breadth-First Approach To Efficient Mesh Traversal. - Tulika Mitra; Tzi-cker Chiueh (Workshop on Graphics Hardware, 1998)

Implementation and Evaluation of the Parallel Mesa Library. - Tulika Mitra; Tzi-cker Chiueh (ICPADS, 1998)

Dynamic Vectorization: A Mechanism for Exploiting Far-Flung ILP in Ordinary Programs. - Sriram Vajapeyam; P. J. Joseph; Tulika Mitra (ISCA, 1999)

Dynamic 3D Graphics Workload Characterization and the Architectural Implications. - Tulika Mitra; Tzi-cker Chiueh (MICRO, 1999)

Application-Specific File Prefetching for Multimedia Programs. - Tulika Mitra; Chuan-Kai Yang; Tzi-cker Chiueh (IEEE International Conference on Multimedia and Expo (I), 2000)

On-the-Fly rendering of losslessly compressed irregular volume data. - Chuan-Kai Yang; Tulika Mitra; Tzi-cker Chiueh (IEEE Visualization, 2000)

Zodiac: A history-based interactive video authoring system. - Tzi-cker Chiueh; Tulika Mitra; Anindya Neogi; Chuan-Kai Yang (Multim. Syst., 2000)

An FPGA Implementation of Triangle Mesh Decompression. - Tulika Mitra; Tzi-cker Chiueh (FCCM, 2002)

A co-simulation study of adaptive EPIC computing. - Stefan Valentin Gheorghita; Weng-Fai Wong; Tulika Mitra; Surendranath Talla (FPT, 2002)

Specifying multithreaded Java semantics for program verification. - Abhik Roychoudhury; Tulika Mitra (ICSE, 2002)

Compression-Domain Parallel Rendering. - Tulika Mitra; Tzi-cker Chiueh (IPDPS, 2002)

Timing Analysis of Embedded Software for Speculative Processors. - Abhik Roychoudhury; Xianfeng Li; Tulika Mitra (ISSS, 2002)

A Decoupled Architecture for Application-Specific File Prefetching. - Chuan-Kai Yang; Tulika Mitra; Tzi-cker Chiueh (USENIX ATC, FREENIX Track, 2002)

Accurate estimation of cache-related preemption delay. - Hemendra Singh Negi; Tulika Mitra; Abhik Roychoudhury (CODES+ISSS, 2003)

Accurate timing analysis by modeling caches, speculation and their interaction. - Xianfeng Li; Tulika Mitra; Abhik Roychoudhury (DAC, 2003)

Using Formal Techniques to Debug the AMBA System-on-Chip Bus Protocol. - Abhik Roychoudhury; Tulika Mitra; S. R. Karri (DATE, 2003)

Compression-Domain Editing of 3D Models. - Tulika Mitra; Tzi-cker Chiueh (DCC, 2003)

A Model for Hardware Realization of Kernel Loops. - Jirong Liao; Weng-Fai Wong; Tulika Mitra (FPL, 2003)

Compactly representing parallel program executions. - Ankit Goel; Abhik Roychoudhury; Tulika Mitra (PPoPP, 2003)

Impact of Java Memory Model on Out-of-Order Multiprocessors. - Tulika Mitra; Abhik Roychoudhury; Qinghua Shen (IEEE PACT, 2004)

Scalable custom instructions identification for instruction-set extensible processors. - Pan Yu; Tulika Mitra (CASES, 2004)

Characterizing embedded applications for instruction-set extensible processors. - Pan Yu; Tulika Mitra (DAC, 2004)

Configuration bitstream compression for dynamically reconfigurable FPGAs. - Lei He; Tulika Mitra; Weng-Fai Wong (ICCAD, 2004)

Design space exploration of caches using compressed traces. - Xianfeng Li; Hemendra Singh Negi; Tulika Mitra; Abhik Roychoudhury (ICS, 2004)

Modeling Out-of-Order Processors for Software Timing Analysis. - Xianfeng Li; Abhik Roychoudhury; Tulika Mitra (RTSS, 2004)

Satisfying real-time constraints with custom instructions. - Pan Yu; Tulika Mitra (CODES+ISSS, 2005)

Analyzing Loop Paths for Execution Time Estimation. - Abhik Roychoudhury; Tulika Mitra; Hemendra Singh Negi (ICDCIT, 2005)

WCET Centric Data Allocation to Scratchpad Memory. - Vivy Suhendra; Tulika Mitra; Abhik Roychoudhury; Ting Chen 002 (RTSS, 2005)

Exploiting Branch Constraints without Exhaustive Path Enumeration. - Ting Chen 002; Tulika Mitra; Abhik Roychoudhury; Vivy Suhendra (WCET, 2005)

Modeling Control Speculation for Timing Analysis. - Xianfeng Li; Tulika Mitra; Abhik Roychoudhury (Real Time Syst., 2005)

Integrated scratchpad memory optimization and task scheduling for MPSoC architectures. - Vivy Suhendra; Chandrashekar Raghavan; Tulika Mitra (CASES, 2006)

Exploiting forwarding to improve data bandwidth of instruction-set extensions. - Ramkumar Jayaseelan; Haibin Liu; Tulika Mitra (DAC, 2006)

Efficient detection and exploitation of infeasible paths for software timing analysis. - Vivy Suhendra; Tulika Mitra; Abhik Roychoudhury; Ting Chen 002 (DAC, 2006)

Estimating the Worst-Case Energy Consumption of Embedded Software. - Ramkumar Jayaseelan; Tulika Mitra; Xianfeng Li (IEEE Real Time Technology and Applications Symposium, 2006)

Handling Constraints in Multi-Objective GA for Embedded System Design. - Biman Chakraborty; Ting Chen 002; Tulika Mitra; Abhik Roychoudhury (VLSI Design, 2006)

Modeling out-of-order processors for WCET analysis. - Xianfeng Li; Abhik Roychoudhury; Tulika Mitra (Real Time Syst., 2006)

Worst-Case Execution Time and Energy Analysis. - Tulika Mitra; Abhik Roychoudhury (The Compiler Design Handbook, 2nd ed., 2007)

A Retargetable Software Timing Analyzer Using Architecture Description Language. - Xianfeng Li; Abhik Roychoudhury; Tulika Mitra; Prabhat Mishra 001; Xu Cheng 001 (ASP-DAC, 2007)

Instruction-set customization for real-time embedded systems. - Huynh Phung Huynh; Tulika Mitra (DATE, 2007)

Cache-Aware Timing Analysis of Streaming Applications. - Samarjit Chakraborty; Tulika Mitra; Abhik Roychoudhury; Lothar Thiele; Unmesh D. Bordoloi; Cem Derdiyok (ECRTS, 2007)

Disjoint Pattern Enumeration for Custom Instructions Identification. - Pan Yu; Tulika Mitra (FPL, 2007)

Timing Analysis of Body Area Network Applications. - Liang Yun; Abhik Roychoudhury; Tulika Mitra (WCET, 2007)

Chronos: A timing analyzer for embedded software. - Xianfeng Li; Liang Yun; Tulika Mitra; Abhik Roychoudhury (Sci. Comput. Program., 2007)

Static analysis for fast and accurate design space exploration of caches. - Yun Liang 001; Tulika Mitra (CODES+ISSS, 2008)

Cache modeling in probabilistic execution time analysis. - Yun Liang 001; Tulika Mitra (DAC, 2008)

Exploring locking & partitioning for predictable shared caches on multi-cores. - Vivy Suhendra; Tulika Mitra (DAC, 2008)

Processor customization for wearable bio-monitoring platforms. - Huynh Phung Huynh; Tulika Mitra (FPT, 2008)

Defining neighborhood relations for fast spatial-temporal partitioning of applications on reconfigurable architectures. - Joon Edward Sim; Tulika Mitra; Weng-Fai Wong (FPT, 2008)

Temperature aware task sequencing and voltage scaling. - Ramkumar Jayaseelan; Tulika Mitra (ICCAD, 2008)

The worst-case execution-time problem - overview of methods and survey of tools. - Reinhard Wilhelm; Jakob Engblom; Andreas Ermedahl; Niklas Holsti; Stephan Thesing; David B. Whalley; Guillem Bernat; Christian Ferdinand; Reinhold Heckmann; Tulika Mitra; Frank Mueller 001; Isabelle Puaut; et al. (ACM Trans. Embed. Comput. Syst., 2008)

Evaluating design trade-offs in customizable processors. - Unmesh D. Bordoloi; Huynh Phung Huynh; Samarjit Chakraborty; Tulika Mitra (DAC, 2009)

Generating test programs to cover pipeline interactions. - Thanh Nga Dang; Abhik Roychoudhury; Tulika Mitra; Prabhat Mishra 001 (DAC, 2009)

A DVS-based pipelined reconfigurable instruction memory. - Zhiguo Ge; Tulika Mitra; Weng-Fai Wong (DAC, 2009)

Dynamic thermal management via architectural adaptation. - Ramkumar Jayaseelan; Tulika Mitra (DAC, 2009)

Runtime reconfiguration of custom instructions for real-time embedded systems. - Huynh Phung Huynh; Tulika Mitra (DATE, 2009)

Probabilistic modeling of data cache behavior. - Vinayak Puranik; Tulika Mitra; Y. N. Srikant (EMSOFT, 2009)

A hybrid local-global approach for multi-core thermal management. - Ramkumar Jayaseelan; Tulika Mitra (ICCAD, 2009)

Timing Analysis of Concurrent Programs Running on Shared Cache Multi-Cores. - Yan Li 012; Vivy Suhendra; Yun Liang 001; Tulika Mitra; Abhik Roychoudhury (RTSS, 2009)

Runtime Adaptive Extensible Embedded Processors - A Survey. - Huynh Phung Huynh; Tulika Mitra (SAMOS, 2009)

An efficient framework for dynamic reconfiguration of instruction-set customization. - Huynh Phung Huynh; Joon Edward Sim; Tulika Mitra (Des. Autom. Embed. Syst., 2009)

Cache-aware optimization of BAN applications. - Lei Ju 001; Yun Liang 001; Samarjit Chakraborty; Tulika Mitra; Abhik Roychoudhury (Des. Autom. Embed. Syst., 2009)

Temperature Aware Scheduling for Embedded Processors. - Ramkumar Jayaseelan; Tulika Mitra (J. Low Power Electron., 2009)

Cache-aware timing analysis of streaming applications. - Samarjit Chakraborty; Tulika Mitra; Abhik Roychoudhury; Lothar Thiele (Real Time Syst., 2009)

Improved procedure placement for set associative caches. - Yun Liang 001; Tulika Mitra (CASES, 2010)

Instruction cache locking using temporal reuse profile. - Yun Liang 001; Tulika Mitra (DAC, 2010)

Efficient custom instructions generation for system-level design. - Huynh Phung Huynh; Yun Liang 001; Tulika Mitra (FPT, 2010)

Design space exploration of instruction set customizable MPSoCs for multimedia applications. - Unmesh D. Bordoloi; Huynh Phung Huynh; Tulika Mitra; Samarjit Chakraborty (ICSAMOS, 2010)

Modeling shared cache and bus in multi-cores for timing analysis. - Sudipta Chattopadhyay 001; Abhik Roychoudhury; Tulika Mitra (SCOPES, 2010)

Scratchpad allocation for concurrent embedded software. - Vivy Suhendra; Abhik Roychoudhury; Tulika Mitra (ACM Trans. Program. Lang. Syst., 2010)

Shared reconfigurable fabric for multi-core customization. - Liang Chen; Tulika Mitra (DAC, 2011)

A novel online hardware task scheduling and placement algorithm for 3D partially reconfigurable FPGAs. - Thomas Marconi; Tulika Mitra (FPT, 2011)

Customized MPSoC synthesis for task sequence. - Liang Chen; Nicolas Boichat; Tulika Mitra (SASP, 2011)

WCET-centric partial instruction cache locking. - Huping Ding; Yun Liang 001; Tulika Mitra (DAC, 2012)

Online scheduling for multi-core shared reconfigurable fabric. - Liang Chen; Thomas Marconi; Tulika Mitra (DATE, 2012)

Timing analysis of concurrent programs running on shared cache multi-cores. - Yun Liang 001; Huping Ding; Tulika Mitra; Abhik Roychoudhury; Yan Li 012; Vivy Suhendra (Real Time Syst., 2012)

Bahurupi: A polymorphic heterogeneous multi-core architecture. - Mihai Pricopi; Tulika Mitra (ACM Trans. Archit. Code Optim., 2012)

Shared cache aware task mapping for WCRT minimization. - Huping Ding; Yun Liang 001; Tulika Mitra (ASP-DAC, 2013)

Power-performance modeling on asymmetric multi-cores. - Mihai Pricopi; Thannirmalai Somu Muthukaruppan; Vanchinathan Venkataramani; Tulika Mitra; Sanjay Vishin (CASES, 2013)

Integrated instruction cache analysis and locking in multitasking real-time systems. - Huping Ding; Yun Liang 001; Tulika Mitra (DAC, 2013)

Hierarchical power management for asymmetric multi-core in dark silicon era. - Thannirmalai Somu Muthukaruppan; Mihai Pricopi; Vanchinathan Venkataramani; Tulika Mitra; Sanjay Vishin (DAC, 2013)

Correction to "Graph Minor Approach for Application Mapping on CGRAs". - Liang Chen; Tulika Mitra (FPT, 2013)

A just-in-time customizable processor. - Liang Chen; Joseph Tarango; Tulika Mitra; Philip Brisk (ICCAD, 2013)

Energy-aware synthesis of application specific MPSoCs. - Thannirmalai Somu Muthukaruppan; Haris Javaid; Tulika Mitra; Sri Parameswaran (ICCD, 2013)

Implementation of core coalition on FPGAs. - Kaushik Triyambaka Mysur; Mihai Pricopi; Thomas Marconi; Tulika Mitra (VLSI-SoC, 2013)

Lifetime Reliability Aware Architectural Adaptation. - Thannirmalai Somu Muthukaruppan; Tulika Mitra (VLSI Design, 2013)

Introduction to the special issue on application-specific processors. - Philip Brisk; Tulika Mitra (ACM Trans. Embed. Comput. Syst., 2013)

An analytical approach for fast and accurate design space exploration of instruction caches. - Yun Liang 001; Tulika Mitra (ACM Trans. Embed. Comput. Syst., 2013)

Price theory based power management for heterogeneous multi-cores. - Thannirmalai Somu Muthukaruppan; Anuj Pathania; Tulika Mitra (ASPLOS, 2014)

Dark silicon as a challenge for hardware/software co-design. - Muhammad Shafique 001; Siddharth Garg; Tulika Mitra; Sri Parameswaran; Jörg Henkel (CODES+ISSS, 2014)

Integrated CPU-GPU Power Management for 3D Mobile Games. - Anuj Pathania; Qing Jiao; Alok Prakash; Tulika Mitra (DAC, 2014)

WCET-Centric dynamic instruction cache locking. - Huping Ding; Yun Liang 001; Tulika Mitra (DATE, 2014)

Design space exploration of multiple loops on FPGAs using high level synthesis. - Guanwen Zhong; Vanchinathan Venkataramani; Yun Liang 001; Tulika Mitra; Smaïl Niar (ICCD, 2014)

Energy-efficient computing with heterogeneous multi-cores. - Tulika Mitra (ISIC, 2014)

Task Scheduling on Adaptive Multi-Core. - Mihai Pricopi; Tulika Mitra (IEEE Trans. Computers, 2014)

Graph Minor Approach for Application Mapping on CGRAs. - Liang Chen; Tulika Mitra (ACM Trans. Reconfigurable Technol. Syst., 2014)

Approximation-aware scheduling on heterogeneous multi-core architectures. - Cheng Tan 002; Thannirmalai Somu Muthukaruppan; Tulika Mitra; Lei Ju 001 (ASP-DAC, 2015)

Improving GPGPU energy-efficiency through concurrent kernel execution and DVFS. - Qing Jiao; Mian Lu; Huynh Phung Huynh; Tulika Mitra (CGO, 2015)

Power-Performance Modelling of Mobile Gaming Workloads on Heterogeneous MPSoCs. - Anuj Pathania; Alexandru Eugen Irimiea; Alok Prakash; Tulika Mitra (DAC, 2015)

SelectDirectory: a selective directory for cache coherence in many-core architectures. - Yuan Yao 006; Guanhua Wang; Zhiguo Ge; Tulika Mitra; Wenzhi Chen; Naxin Zhang (DATE, 2015)

Energy-efficient execution of data-parallel applications on heterogeneous mobile platforms. - Alok Prakash; Siqi Wang; Alexandru Eugen Irimiea; Tulika Mitra (ICCD, 2015)

Heterogeneous Multi-core Architectures. - Tulika Mitra (IPSJ Trans. Syst. LSI Des. Methodol., 2015)

Instruction Cache Locking Using Temporal Reuse Profile. - Yun Liang 001; Tulika Mitra; Lei Ju 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Distributed scheduling for many-cores using cooperative game theory. - Anuj Pathania; Vanchinathan Venkataramani; Muhammad Shafique 001; Tulika Mitra; Jörg Henkel (DAC, 2016)

Improving mobile gaming performance through cooperative CPU-GPU thermal management. - Alok Prakash; Hussam Amrouch; Muhammad Shafique 001; Tulika Mitra; Jörg Henkel (DAC, 2016)

Lin-analyzer: a high-level performance analysis tool for FPGA-based accelerators. - Guanwen Zhong; Alok Prakash; Yun Liang 001; Tulika Mitra; Smaïl Niar (DAC, 2016)

Distributed fair scheduling for many-cores. - Anuj Pathania; Vanchinathan Venkataramani; Muhammad Shafique 001; Tulika Mitra; Jörg Henkel (DATE, 2016)

Combined on-line lifetime-energy optimization for asymmetric multicores. - Cristiana Bolchini; Matteo Carminati; Tulika Mitra; Thannirmalai Somu Muthukaruppan (DFT, 2016)

Efficient Timestamp-Based Cache Coherence Protocol for Many-Core Architectures. - Yuan Yao 006; Guanhua Wang; Zhiguo Ge; Tulika Mitra; Wenzhi Chen; Naxin Zhang (ICS, 2016)

Automated partitioning of android applications for trusted execution environments. - Konstantin Rubinov; Lucia Rosculete; Tulika Mitra; Abhik Roychoudhury (ICSE, 2016)

Adaptive Isolation for Predictability and Security (Dagstuhl Seminar 16441). - Tulika Mitra; Jürgen Teich; Lothar Thiele (Dagstuhl Reports, 2016)

Design of Multiple-Target Tracking System on Heterogeneous System-on-Chip Devices. - Guanwen Zhong; Smaïl Niar; Alok Prakash; Tulika Mitra (IEEE Trans. Veh. Technol., 2016)

HyCUBE: A CGRA with Reconfigurable Single-cycle Multi-hop Interconnect. - Manupa Karunaratne; Aditi Kulkarni Mohite; Tulika Mitra; Li-Shiuan Peh (DAC, 2017)

Scalable probabilistic power budgeting for many-cores. - Anuj Pathania; Heba Khdr; Muhammad Shafique 001; Tulika Mitra; Jörg Henkel (DATE, 2017)

Design Space exploration of FPGA-based accelerators with multi-level parallelism. - Guanwen Zhong; Alok Prakash; Siqi Wang; Yun Liang 001; Tulika Mitra; Smaïl Niar (DATE, 2017)

Mobile heterogeneous computing: a software perspective. - Tulika Mitra (ESTIMedia, 2017)

A Rapid Data Communication Exploration Tool for Hybrid CPU-FPGA Architectures. - Mariem Makni; Smaïl Niar; Mouna Baklouti; Guanwen Zhong; Tulika Mitra; Mohamed Abid (PDP, 2017)

Defragmentation of Tasks in Many-Core Architecture. - Anuj Pathania; Vanchinathan Venkataramani; Muhammad Shafique 001; Tulika Mitra; Jörg Henkel (ACM Trans. Archit. Code Optim., 2017)

Optimal Greedy Algorithm for Many-Core Scheduling. - Anuj Pathania; Vanchinathan Venkataramani; Muhammad Shafique 001; Tulika Mitra; Jörg Henkel (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

CGPredict: Embedded GPU Performance Estimation from Single-Threaded Applications. - Siqi Wang; Guanwen Zhong; Tulika Mitra (ACM Trans. Embed. Comput. Syst., 2017)

TC-Release++: An Efficient Timestamp-Based Coherence Protocol for Many-Core Architectures. - Yuan Yao 006; Wenzhi Chen; Tulika Mitra; Yang Xiang 001 (IEEE Trans. Parallel Distributed Syst., 2017)

Introduction to Hardware/Software Codesign. - Soonhoi Ha; Jürgen Teich; Christian Haubelt; Michael Glaß; Tulika Mitra; Rainer Dömer; Petru Eles; Aviral Shrivastava; Andreas Gerstlauer; Shuvra S. Bhattacharyya (Handbook of Hardware/Software Codesign, 2017)

Application-Specific Processors. - Tulika Mitra (Handbook of Hardware/Software Codesign, 2017)

Analytical Two-Level Near Threshold Cache Exploration for Low Power Biomedical Applications. - Yun Liang 001; Shuo Wang 009; Tulika Mitra; Yajun Ha (ACA, 2018)

Dnestmap: mapping deeply-nested loops on ultra-low power CGRAs. - Manupa Karunaratne; Cheng Tan 002; Aditi Kulkarni Mohite; Tulika Mitra; Li-Shiuan Peh (DAC, 2018)

QoS-aware stochastic power management for many-cores. - Anuj Pathania; Heba Khdr; Muhammad Shafique 001; Tulika Mitra; Jörg Henkel (DAC, 2018)

PR3: Power Efficient and Low Latency Baseband Processing for LTE Femtocells. - Nishant Budhdev; Mun Choon Chan; Tulika Mitra (INFOCOM, 2018)

Stitch: Fusible Heterogeneous Accelerators Enmeshed with Many-Core Architecture for Wearables. - Cheng Tan 002; Manupa Karunaratne; Tulika Mitra; Li-Shiuan Peh (ISCA, 2018)

Software Support for Heterogeneous Computing. - Siqi Wang; Alok Prakash; Tulika Mitra (ISVLSI, 2018)

Scalable Dynamic Task Scheduling on Adaptive Many-Core. - Vanchinathan Venkataramani; Anuj Pathania; Muhammad Shafique 001; Tulika Mitra; Jörg Henkel (MCSoC, 2018)

Synergy: A HW/SW Framework for High Throughput CNNs on Embedded Heterogeneous SoC. - Guanwen Zhong; Akshat Dubey; Cheng Tan 002; Tulika Mitra (CoRR, 2018)

oo7: Low-overhead Defense against Spectre Attacks via Binary Analysis. - Guanhua Wang; Sudipta Chattopadhyay 001; Ivan Gotovchits; Tulika Mitra; Abhik Roychoudhury (CoRR, 2018)

Guest Editors' Introduction: Special Issue on Time-Critical Systems Design. - Tulika Mitra; Jürgen Teich; Lothar Thiele (IEEE Des. Test, 2018)

Time-Critical Systems Design: A Survey. - Tulika Mitra; Jürgen Teich; Lothar Thiele (IEEE Des. Test, 2018)

Guest Editors' Introduction: Special Issue on Time-Critical Systems Design Part II. - Tulika Mitra; Jürgen Teich; Lothar Thiele (IEEE Des. Test, 2018)

LOCUS: Low-Power Customizable Many-Core Architecture for Wearables. - Cheng Tan 002; Aditi Kulkarni Mohite; Vanchinathan Venkataramani; Manupa Karunaratne; Tulika Mitra; Li-Shiuan Peh (ACM Trans. Embed. Comput. Syst., 2018)

HyCUBE: A 0.9V 26.4 MOPS/mW, 290 pJ/op, Power Efficient Accelerator for IoT Applications. - Bo Wang 020; Manupa Karunarathne; Aditi Kulkarni Mohite; Tulika Mitra; Li-Shiuan Peh (A-SSCC, 2019)

Time-Predictable Computing by Design: Looking Back, Looking Forward. - Tulika Mitra (DAC, 2019)

Prediction-Based Task Migration on S-NUCA Many-Cores. - Martin Rapp; Anuj Pathania; Tulika Mitra; Jörg Henkel (DATE, 2019)

4D-CGRA: Introducing Branch Dimension to Spatio-Temporal Application Mapping on CGRAs. - Manupa Karunaratne; Dhananjaya Wijerathne; Tulika Mitra; Li-Shiuan Peh (ICCAD, 2019)

SPECTRUM: a software defined predictable many-core architecture for LTE baseband processing. - Vanchinathan Venkataramani; Aditi Kulkarni Mohite; Tulika Mitra; Li-Shiuan Peh (LCTES, 2019)

Scalable Optimal Greedy Scheduler for Asymmetric Multi-/Many-Core Processors. - Vanchinathan Venkataramani; Anuj Pathania; Tulika Mitra (SAMOS, 2019)

High-Throughput CNN Inference on Embedded ARM big.LITTLE Multi-Core Processors. - Siqi Wang; Gayathri Ananthanarayanan; Yifan Zeng; Neeraj Goel; Anuj Pathania; Tulika Mitra (CoRR, 2019)

OPTiC: Optimizing Collaborative CPU-GPU Computing on Mobile Devices With Thermal Constraints. - Siqi Wang; Gayathri Ananthanarayanan; Tulika Mitra (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Scratchpad-Memory Management for Multi-Threaded Applications on Many-Core Architectures. - Vanchinathan Venkataramani; Mun Choon Chan; Tulika Mitra (ACM Trans. Embed. Comput. Syst., 2019)

CASCADE: High Throughput Data Streaming via Decoupled Access-Execute CGRA. - Dhananjaya Wijerathne; Zhaoying Li; Manupa Karunarathne; Anuj Pathania; Tulika Mitra (ACM Trans. Embed. Comput. Syst., 2019)

Synergy: An HW/SW Framework for High Throughput CNNs on Embedded Heterogeneous SoC. - Guanwen Zhong; Akshat Dubey; Cheng Tan 002; Tulika Mitra (ACM Trans. Embed. Comput. Syst., 2019)

Slicing 5G fronthaul networks using programmable switches. - Nishant Budhdev; Raj Joshi; Pravein Govindan Kannan; Mun Choon Chan; Tulika Mitra (CoNEXT, 2020)

BrezeFlow: Unified Debugger for Android CPU Power Governors and Schedulers on Edge Devices. - Alexander Hoffman; Anuj Pathania; Philipp H. Kindt; Samarjit Chakraborty; Tulika Mitra (DAC, 2020)

Unified Thread- and Data-Mapping for Multi-Threaded Multi-Phase Applications on SPM Many-Cores. - Vanchinathan Venkataramani; Anuj Pathania; Tulika Mitra (DATE, 2020)

Time-Predictable Software-Defined Architecture with Sdf-Based Compiler Flow for 5g Baseband Processing. - Vanchinathan Venkataramani; Bruno Bodin; Aditi Kulkarni Mohite; Tulika Mitra; Li-Shiuan Peh (ICASSP, 2020)

Poster: IsoRAN: Isolation and Scaling for 5G RAN via User-Level Data Plane Virtualization. - Nishant Budhdev; Mun Choon Chan; Tulika Mitra (Networking, 2020)

Simultaneous Progressing Switching Protocols for Timing Predictable Real-Time Network-on-Chips. - Niklas Ueter; Jian-Jia Chen; Georg von der Brüggen; Vanchinathan Venkataramani; Tulika Mitra (RTCSA, 2020)

Mobile Application Processors: Techniques for Software Power-Performance Optimization. - Alok Prakash; Siqi Wang; Tulika Mitra (IEEE Consumer Electron. Mag., 2020)

IsoRAN: Isolation and Scaling for 5G RANvia User-Level Data Plane Virtualization. - Nishant Budhdev; Mun Choon Chan; Tulika Mitra (CoRR, 2020)

ESWEEK 2019 Conference Report. - Petru Eles; Tulika Mitra (IEEE Des. Test, 2020)

Guest Editors' Introduction: Selected Papers from IEEE VLSI Test Symposium. - Peter Marwedel; Tulika Mitra; Martin Edin Grimheden; Hugo A. Andrade (IEEE Des. Test, 2020)

Survey on Education for Cyber-Physical Systems. - Peter Marwedel; Tulika Mitra; Martin Edin Grimheden; Hugo A. Andrade (IEEE Des. Test, 2020)

Neural Network Inference on Mobile SoCs. - Siqi Wang; Anuj Pathania; Tulika Mitra (IEEE Des. Test, 2020)

High-Throughput CNN Inference on Embedded ARM Big.LITTLE Multicore Processors. - Siqi Wang; Gayathri Ananthanarayanan; Yifan Zeng; Neeraj Goel; Anuj Pathania; Tulika Mitra (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

SPECTRUM: A Software-defined Predictable Many-core Architecture for LTE/5G Baseband Processing. - Vanchinathan Venkataramani; Aditi Kulkarni Mohite; Tulika Mitra; Li-Shiuan Peh (ACM Trans. Embed. Comput. Syst., 2020)

KLEESpectre: Detecting Information Leakage through Speculative Cache Attacks via Symbolic Execution. - Guanhua Wang; Sudipta Chattopadhyay 001; Arnab Kumar Biswas; Tulika Mitra; Abhik Roychoudhury (ACM Trans. Softw. Eng. Methodol., 2020)

FSA: fronthaul slicing architecture for 5G using dataplane programmable switches. - Nishant Budhdev; Raj Joshi; Pravein Govindan Kannan; Mun Choon Chan; Tulika Mitra (MobiCom, 2021)

Report on the 2020 Embedded Systems Week (ESWEEK): A Virtual Event during a Pandemic, September 20-25. - Tulika Mitra; Andreas Gerstlauer (IEEE Des. Test, 2021)

Neural Network-Based Performance Prediction for Task Migration on S-NUCA Many-Cores. - Martin Rapp; Anuj Pathania; Tulika Mitra; Jörg Henkel (IEEE Trans. Computers, 2021)

Power-Efficient Heterogeneous Many-Core Design With NCFET Technology. - Sami Salamin; Martin Rapp; Anuj Pathania; Arka Maity; Jörg Henkel; Tulika Mitra; Hussam Amrouch (IEEE Trans. Computers, 2021)

Editorial: Reimagining ACM Transactions on Embedded Computing Systems (TECS). - Tulika Mitra (ACM Trans. Embed. Comput. Syst., 2021)

oo7: Low-Overhead Defense Against Spectre Attacks via Program Analysis. - Guanhua Wang; Sudipta Chattopadhyay 001; Ivan Gotovchits; Tulika Mitra; Abhik Roychoudhury (IEEE Trans. Software Eng., 2021)

Robust and Resource-Efficient Data-Free Knowledge Distillation by Generative Pseudo Replay. - Kuluhan Binici; Shivam Aggarwal; Nam Trung Pham; Karianto Leman; Tulika Mitra (AAAI, 2022)

REVAMP: a systematic framework for heterogeneous CGRA realization. - Thilini Kaushalya Bandara; Dhananjaya Wijerathne; Tulika Mitra; Li-Shiuan Peh (ASPLOS, 2022)

PANORAMA: divide-and-conquer approach for mapping complex loop kernels on CGRA. - Dhananjaya Wijerathne; Zhaoying Li; Thilini Kaushalya Bandara; Tulika Mitra (DAC, 2022)

GraphWave: A Highly-Parallel Compute-at-Memory Graph Processing Accelerator. - Jinho Lee; Burin Amornpaisannon; Tulika Mitra; Trevor E. Carlson (DATE, 2022)

LISA: Graph Neural Network based Portable Mapping on Spatial Accelerators. - Zhaoying Li; Dan Wu; Dhananjaya Wijerathne; Tulika Mitra (HPCA, 2022)

Power-Performance Characterization of TinyML Systems. - Yujie Zhang; Dhananjaya Wijerathne; Zhaoying Li; Tulika Mitra (ICCD, 2022)

Load balancing for a user-level virtualized 5G cloud-RAN. - Nishant Budhdev; Arka Maity; Mun Choon Chan; Tulika Mitra (MobiArch, 2022)

Preventing Catastrophic Forgetting and Distribution Mismatch in Knowledge Distillation via Synthetic Data. - Kuluhan Binici; Nam Trung Pham; Tulika Mitra; Karianto Leman (WACV, 2022)

ChordMap: Automated Mapping of Streaming Applications Onto CGRA. - Zhaoying Li; Dhananjaya Wijerathne; Xianzhang Chen; Anuj Pathania; Tulika Mitra (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

ASCENT: Communication Scheduling for SDF on Bufferless Software-Defined NoC. - Vanchinathan Venkataramani; Bruno Bodin; Aditi Kulkarni Mohite; Tulika Mitra; Li-Shiuan Peh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

HiMap: Fast and Scalable High-Quality Mapping on CGRA via Hierarchical Abstraction. - Dhananjaya Wijerathne; Zhaoying Li; Anuj Pathania; Tulika Mitra; Lothar Thiele (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

FLEX: Introducing FLEXible Execution on CGRA with Spatio-Temporal Vector Dataflow. - Thilini Kaushalya Bandara; Dan Wu; Rohan Juneja; Dhananjaya Wijerathne; Tulika Mitra; Li-Shiuan Peh (ICCAD, 2023)

Accelerating Edge AI with Morpher: An Integrated Design, Compilation and Simulation Framework for CGRAs. - Dhananjaya Wijerathne; Zhaoying Li; Tulika Mitra (CoRR, 2023)

InkStream: Real-time GNN Inference on Streaming Graphs via Incremental Update. - Dan Wu; Zhaoying Li; Tulika Mitra (CoRR, 2023)

Accelerating Unstructured SpGEMM using Structured In-situ Computing. - Huize Li; Tulika Mitra (CoRR, 2023)

Post-Training Quantization with Low-precision Minifloats and Integers on FPGAs. - Shivam Aggarwal; Alessandro Pappalardo; Hans Jakob Damsgaard; Giuseppe Franco; Thomas B. Preußer; Michaela Blott; Tulika Mitra (CoRR, 2023)

The 2022 International Conference on Computer-Aided Design (ICCAD). - Tulika Mitra (IEEE Des. Test, 2023)

ZeD: A Generalized Accelerator for Variably Sparse Matrix Computations in ML. - Pranav Dangi; Zhenyu Bai; Rohan Juneja; Dhananjaya Wijerathne; Tulika Mitra (PACT, 2024)

Generalizing Teacher Networks for Effective Knowledge Distillation Across Student Architectures. - Kuluhan Binici; Weiming Wu; Tulika Mitra (BMVC, 2024)

SWAT: Scalable and Efficient Window Attention-based Transformers Acceleration on FPGAs. - Zhenyu Bai; Pranav Dangi; Huize Li; Tulika Mitra (DAC, 2024)

CRISP: Hybrid Structured Sparsity for Class-Aware Model Pruning. - Shivam Aggarwal; Kuluhan Binici; Tulika Mitra (DATE, 2024)

Shedding the Bits: Pushing the Boundaries of Quantization with Minifloats on FPGAs. - Shivam Aggarwal; Hans Jakob Damsgaard; Alessandro Pappalardo; Giuseppe Franco; Thomas B. Preußer; Michaela Blott; Tulika Mitra (FPL, 2024)

PACE: A Scalable and Energy Efficient CGRA in a RISC-V SoC for Edge Computing Applications. - Vishnu P. Nambiar; Yi Sheng Chong; Thilini Kaushalya Bandara; Dhananjaya Wijerathne; Zhaoying Li; Rohan Juneja; Li-Shiuan Peh; Tulika Mitra; Anh Tuan Do (HCS, 2024)

ASADI: Accelerating Sparse Attention Using Diagonal-based In-Situ Computing. - Huize Li; Zhaoying Li; Zhenyu Bai; Tulika Mitra (HPCA, 2024)

Sustainable Hardware Specialization. - Pranav Dangi; Thilini Kaushalya Bandara; Saeideh Sheikhpour; Tulika Mitra; Lieven Eeckhout (ICCAD, 2024)

A 360 GOPS/W CGRA in a RISC-V SoC with Multi-Hop Routers and Idle-State Instructions for Edge Computing Applications. - Vishnu P. Nambiar; Y. S. Chong; Thilini Kaushalya Bandara; Dhananjaya Wijerathne; Z. Li; Rohan Juneja; Li-Shiuan Peh; Tulika Mitra; A. T. Do (ISOCC, 2024)

ICED: An Integrated CGRA Framework Enabling DVFS-Aware Acceleration. - Cheng Tan 002; Miaomiao Jiang; Deepak Patil; Yanghui Ou; Zhaoying Li; Lei Ju 001; Tulika Mitra; Hyunchul Park; Antonino Tumeo; Jeff Zhang 001 (MICRO, 2024)

SparrowSNN: A Hardware/software Co-design for Energy Efficient ECG Classification. - Zhanglu Yan; Zhenyu Bai; Tulika Mitra; Weng-Fai Wong (CoRR, 2024)

Condensed Sample-Guided Model Inversion for Knowledge Distillation. - Kuluhan Binici; Shivam Aggarwal; Cihan Acar; Nam Trung Pham; Karianto Leman; Gim Hee Lee; Tulika Mitra (CoRR, 2024)

Flip: Data-centric Edge CGRA Accelerator. - Dan Wu; Peng Chen 027; Thilini Kaushalya Bandara; Zhaoying Li; Tulika Mitra (ACM Trans. Design Autom. Electr. Syst., 2024)

Chameleon: Dual Memory Replay for Online Continual Learning on Edge Devices. - Shivam Aggarwal; Kuluhan Binici; Tulika Mitra (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Enhancing CGRA Efficiency Through Aligned Compute and Communication Provisioning. - Zhaoying Li; Pranav Dangi; Chenyang Yin; Thilini Kaushalya Bandara; Rohan Juneja; Cheng Tan 002; Zhenyu Bai; Tulika Mitra (ASPLOS (1), 2025)

HyAtten: Hybrid Photonic-Digital Architecture for Accelerating Attention Mechanism. - Huize Li; Dan Chen 006; Tulika Mitra (DATE, 2025)

DAOP: Data-Aware Offloading and Predictive Pre-Calculation for Efficient MoE Inference. - Yujie Zhang; Shivam Aggarwal; Tulika Mitra (DATE, 2025)

Inkstream: Instantaneous GNN Inference on Dynamic Graphs via Incremental Update. - Dan Wu; Zhaoying Li; Tulika Mitra (IPDPS, 2025)

Hybrid Photonic-digital Accelerator for Attention Mechanism. - Huize Li; Dan Chen 006; Tulika Mitra (CoRR, 2025)

Data-aware Dynamic Execution of Irregular Workloads on Heterogeneous Systems. - Zhenyu Bai; Dan Wu; Pranav Dangi; Dhananjaya Wijerathne; Venkata Pavan Kumar Miriyala; Tulika Mitra (CoRR, 2025)

Nexus Machine: An Active Message Inspired Reconfigurable Architecture for Irregular Workloads. - Rohan Juneja; Pranav Dangi; Thilini Kaushalya Bandara; Zhaoying Li; Tulika Mitra; Li-Shiuan Peh (CoRR, 2025)

TerEffic: Highly Efficient Ternary LLM Inference on FPGA. - Chenyang Yin; Zhenyu Bai; Pranav Venkatram; Shivam Aggarwal; Zhaoying Li; Tulika Mitra (CoRR, 2025)

HALO: Hardware-aware quantization with low critical-path-delay weights for LLM acceleration. - Rohan Juneja; Shivam Aggarwal; Safeen Huda; Tulika Mitra; Li-Shiuan Peh (CoRR, 2025)

SADIMM: Accelerating $ underline{ text{S}}$S - parse $ underline{ text{A}}$A - ttention Using $ underline{ text{DIMM}}$DIMM - -Based Near-Memory Processing. - Huize Li; Dan Chen 006; Tulika Mitra (IEEE Trans. Computers, 2025)

SPLIM: Bridging the Gap Between Unstructured SpGEMM and Structured In-Situ Computing. - Huize Li; Dan Chen 006; Tulika Mitra (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)