Power-Throughput Trade-off Analysis for a Novel Multi-Boolean AV1 Arithmetic Encoder Design. - Tulio Pereira Bitencourt; Fábio Luís Livi Ramos; Sergio Bampi (PCS, 2022)

Area and Power Efficient 8K Real-Time Design for AV1 Arithmetic Decoding. - Jiovana Sousa Gomes; Tulio Pereira Bitencourt; Sergio Bampi; Fábio Luís Livi Ramos (PCS, 2022)

Power-Saving 8K Real-Time AV1 Arithmetic Encoder Architecture. - Tulio Pereira Bitencourt; Fábio Luís Livi Ramos; Sergio Bampi (IEEE Des. Test, 2022)

Low-Power High-Throughput Architecture for AV1 Arithmetic Decoder. - Jiovana Sousa Gomes; Tulio Pereira Bitencourt; Sergio Bampi; Fábio Luís Livi Ramos (IEEE Des. Test, 2022)

Analysis of AV1 Arithmetic Decoder Design Space with a Novel Multi-Boolean Approach. - Jiovana Sousa Gomes; Tulio Pereira Bitencourt; Sergio Bampi; Fábio Luís Livi Ramos (LASCAS, 2023)