Parasitic-aware GP-based many-objective sizing methodology for analog and RF integrated circuits. - Tuotian Liao; Lihong Zhang (ASP-DAC, 2017)

Layout-dependent effects aware gm/iD-based many-objective sizing optimization for analog integrated circuits. - Tuotian Liao; Lihong Zhang (ISCAS, 2018)

Fast Performance Evaluation for Analog Circuit Synthesis Frameworks. - Zhenxin Zhao; Tuotian Liao; Lihong Zhang (ISCAS, 2018)

Parasitic-aware gm/ID-based many-objective analog/RF circuit sizing. - Tuotian Liao; Lihong Zhang (ISQED, 2018)

Efficient parasitic-aware hybrid sizing methodology for analog and RF integrated circuits. - Tuotian Liao; Lihong Zhang (Integr., 2018)

An LDE-Aware gm/ID-Based Hybrid Sizing Method for Analog Integrated Circuits. - Tuotian Liao; Lihong Zhang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Efficient Parasitic-aware gm/ID-based Hybrid Sizing Methodology for Analog and RF Integrated Circuits. - Tuotian Liao; Lihong Zhang (ACM Trans. Design Autom. Electr. Syst., 2021)

High-Dimensional Many-Objective Bayesian Optimization for LDE-Aware Analog IC Sizing. - Tuotian Liao; Lihong Zhang (IEEE Trans. Very Large Scale Integr. Syst., 2022)