Communication-Aware Module Placement for Power Reduction in Large FPGA Designs. - Kalindu Herath; Alok Prakash; Udaree Kanewala; Thambipillai Srikanthan (ISVLSI, 2018)

Exploring Deep Learning and Tree-Based Ensemble Models for Chiller Energy Consumption Predictions. - Udaree Kanewala; Supun Weerakoon; Ruwan D. Nawarathna (ICIIS, 2021)