An automatic experimental set-up for robustness analysis of designs implemented on SRAM FPGAS. - Uli Kretzschmar; Armando Astarloa; Jesús Lázaro 001; Jaime Jimenez; Aitzol Zuloaga (SoC, 2011)

Robustness Analysis of Different AES Implementations on SRAM Based FPGAs. - Uli Kretzschmar; Armando Astarloa; Jesús Lázaro 001; Unai Bidarte; Jaime Jimenez (ReConFig, 2011)

On the design of an heuristically optimized multiband spectrum sensing approach for cognitive radio systems. - Javier Del Ser; Asier Alonso; Sergio Gil-Lopez; Mikel Garay; Uli Kretzschmar; Armando Astarloa (CAMAD, 2012)

Fast and accurate Single Bit Error injection into SRAM Based FPGAs. - Uli Kretzschmar; Armando Astarloa; Jaime Jimenez; Mikel Garay; Javier Del Ser (FPL, 2012)

Robustness of different TMR granularities in shared wishbone architectures on SRAM FPGA. - Uli Kretzschmar; Armando Astarloa; Jesús Lázaro 001; Mikel Garay; Javier Del Ser (ReConFig, 2012)

SEU Resilience of DES, AES and Twofish in SRAM-Based FPGA. - Uli Kretzschmar; Armando Astarloa; Jesús Lázaro 001 (ARC, 2013)

Fast context reloading lockstep approach for SEUs mitigation in a FPGA soft core processor. - Julen Gomez-Cornejo; Aitzol Zuloaga; Uli Kretzschmar; Unai Bidarte; Jaime Jimenez (IECON, 2013)

SHA-3 based Message Authentication Codes to secure IEEE 1588 synchronization systems. - Naiara Moreira; Armando Astarloa; Uli Kretzschmar (IECON, 2013)

Fast and accurate SEU-tolerance characterization method for Zynq SoCs. - Igor Villata; Unai Bidarte; Uli Kretzschmar; Armando Astarloa; Jesús Lázaro 001 (FPL, 2014)

Securing IEEE 1588 messages with message authentication codes based on the KECCAK cryptographic algorithm implemented in FPGAs. - Naiara Moreira; Armando Astarloa; Uli Kretzschmar; Jesús Lázaro 001; Elias Molina (ISIE, 2014)

Compact and Fast Fault Injection System for Robustness Measurements on SRAM-Based FPGAs. - Uli Kretzschmar; Armando Astarloa; Jaime Jimenez; Mikel Garay; Javier Del Ser (IEEE Trans. Ind. Electron., 2014)

Synchronization of faulty processors in coarse-grained TMR protected partially reconfigurable FPGA designs. - Uli Kretzschmar; Julen Gomez-Cornejo; Armando Astarloa; Unai Bidarte; Javier Del Ser (Reliab. Eng. Syst. Saf., 2016)

A novel BRAM content accessing and processing method based on FPGA configuration bitstream. - Julen Gomez-Cornejo; Aitzol Zuloaga; Igor Villalta; Javier Del Ser; Uli Kretzschmar; Jesús Lázaro 001 (Microprocess. Microsystems, 2017)