Testing the Enterprise IBM System/390TM Multi Processor. - Otto A. Torreiter; Ulrich Baur; Georg Goecke; Kevin Melocco (ITC, 1997)

Standard-cell-based design methodology for high-performance support chips. - Bernhard Kick; Ulrich Baur; Jürgen Koehl; Thomas Ludwig 004; Thomas Pflueger (IBM J. Res. Dev., 1997)

A Flat, Timing-Driven Design System for a High-Performance CMOS Processor Chipset. - Jürgen Koehl; Ulrich Baur; Thomas Ludwig 004; Bernhard Kick; Thomas Pflueger (DATE, 1998)

Delay test of chip I/Os using LSSD boundary scan. - Pamela S. Gillis; Francis Woytowich; Kevin McCauley; Ulrich Baur (ITC, 1998)