Realisierungsprinzipien von Mikrorechnern hoher numerischer Leistung. - Ulrich Brüning 001 (1987)

The Architecture of the European MIMD Supercomputer GENESIS. - Ulrich Brüning 001; Wolfgang K. Giloi; Wolfgang Schröder-Preikschat (EDMCC, 1991)

Latency Hiding in Message-Passing Architectures. - Ulrich Brüning 001; Wolfgang K. Giloi; Wolfgang Schröder-Preikschat (IPPS, 1994)

MANNA: Prototype of a Distributed Memory Architecture with Maximized Sustained Performance. - Wolfgang K. Giloi; Ulrich Brüning 001; Wolfgang Schröder-Preikschat (PDP, 1996)

ATOLL: A High-Performance Communication Device for Massively Parallel Systems. - Ulrich Brüning 001; Lambert Schaelicke (APDC, 1997)

ATOLL: A Network on a Chip. - Lars Rzymianowicz; Ulrich Brüning 001; Jörg Kluge; Patrick R. Schulz; Mathias Waack (PDPTA, 1999)

Trends und Entwicklungen der Kommunikationstechnik für den Aufbau von Rechnerclustern. - Ulrich Brüning 001 (Prax. Inf.verarb. Kommun., 1999)

Cluster SMP Nodes with the ATOLL Network: A Look into the Future of System Area Networks. - Lars Rzymianowicz; Mathias Waack; Ulrich Brüning 001; Markus Fischer 001; Jörg Kluge; Patrick R. Schulz (HPCN Europe, 2000)

ATOLL, a New Switched, High Speed Interconnect in Comparison to Myrinet and SCI. - Markus Fischer 001; Ulrich Brüning 001; Jörg Kluge; Lars Rzymianowicz; Patrick R. Schulz; Mathias Waack (IPDPS Workshops, 2000)

Designing 3-D Nonlinear Diffusion Filters for High Performance Cluster Computing. - Andrés Bruhn; Tobias Jakob; Markus Fischer 001; Timo Kohlberger; Joachim Weickert; Ulrich Brüning 001; Christoph Schnörr (DAGM-Symposium, 2002)

ATOLL: Performance and Cost Optimization of a San Interconnect. - Ulrich Brüning 001; Holger Fröning; Patrick R. Schulz; Lars Rzymianowicz (IASTED PDCS, 2002)

Low Level Parallelization of Nonlinear Diffusion Filtering Algorithms for Cluster Computing Environments. - David Slogsnat; Markus Fischer 001; Andrés Bruhn; Joachim Weickert; Ulrich Brüning 001 (Euro-Par, 2003)

SEED2002 Support of Educational course for Electronic Design. - Patrick R. Schulz; Ulrich Brüning 001; Gunter Strube (MSE, 2003)

Systeme für eine hocheffiziente elektrische und optische Kurzstreckenübertragung im SAN-Bereich (Systems for High-Efficient Electrical and Optical Short-Distance Data Transmission in System-Area-Networks). - Ulrich Brüning 001; Ulrich Krackhardt (it Inf. Technol., 2003)

Future Building Blocks for Parallel Architectures. - Ulrich Brüning 001; Wolfgang K. Giloi (ICPP, 2004)

High performance cluster computing with 3-D nonlinear diffusion filters. - Andrés Bruhn; Tobias Jakob; Markus Fischer 001; Timo Kohlberger; Joachim Weickert; Ulrich Brüning 001; Christoph Schnörr (Real Time Imaging, 2004)

Performance Evaluation of the ATOLL Interconnect. - Holger Fröning; Mondrian Nüssle; David Slogsnat; Patrick R. Haspel; Ulrich Brüning 001 (Parallel and Distributed Computing and Networks, 2005)

Swordfish: A Simulator for High-Performance Networks. - Mondrian Nüssle; Holger Fröning; Ulrich Brüning 001 (IASTED PDCS, 2005)

A versatile, low latency HyperTransport core. - David Slogsnat; Alexander Giese; Ulrich Brüning 001 (FPGA, 2007)

VELO: A Novel Communication Engine for Ultra-Low Latency Message Transfers. - Heiner Litz; Holger Fröning; Mondrian Nüssle; Ulrich Brüning 001 (ICPP, 2008)

An open-source HyperTransport core. - David Slogsnat; Alexander Giese; Mondrian Nüssle; Ulrich Brüning 001 (ACM Trans. Reconfigurable Technol. Syst., 2008)

A HyperTransport 3 Physical Layer Interface for FPGAs. - Heiner Litz; Holger Fröning; Ulrich Brüning 001 (ARC, 2009)

An FPGA based verification platform for HyperTransport 3.x. - Heiner Litz; Holger Fröning; Maximilian Thürmer; Ulrich Brüning 001 (FPL, 2009)

Efficient Virtualization of High-Performance Network Interfaces. - Holger Fröning; Heiner Litz; Ulrich Brüning 001 (ICN, 2009)

A Resource Optimized Remote-Memory-Access Architecture for Low-latency Communication. - Mondrian Nüssle; Martin Scherer; Ulrich Brüning 001 (ICPP, 2009)

An FPGA-Based Custom High Performance Interconnection Network. - Mondrian Nüssle; Benjamin Geib; Holger Fröning; Ulrich Brüning 001 (ReConFig, 2009)

TCCluster: A Cluster Architecture Utilizing the Processor Host Interface as a Network Interconnect. - Heiner Litz; Maximilian Thürmer; Ulrich Brüning 001 (CLUSTER, 2010)

High Performance Networks. - José Flich; Alfonso Urso; Ulrich Brüning 001; Giuseppe Di Fatta (Euro-Par (2), 2010)

Introduction. - Jesper Larsson Träff; Brice Goglin; Ulrich Brüning 001; Fabrizio Petrini (Euro-Par (2), 2011)

MPI Functions and Their Impact on Interconnect Hardware. - Ulrich Brüning 001 (EuroMPI, 2012)

On Achieving High Message Rates. - Holger Fröning; Mondrian Nüssle; Heiner Litz; Christian Leber; Ulrich Brüning 001 (CCGRID, 2013)

Scalable communication architecture for network-attached accelerators. - Sarah Neuwirth; Dirk Frey; Mondrian Nuessle; Ulrich Brüning 001 (HPCA, 2015)

Communication Models for Distributed Intel Xeon Phi Coprocessors. - Sarah Neuwirth; Dirk Frey; Ulrich Brüning 001 (ICPADS, 2015)

openHMC - a configurable open-source hybrid memory cube controller. - Juri Schmidt; Ulrich Brüning 001 (ReConFig, 2015)

Exploring Time and Energy for Complex Accesses to a Hybrid Memory Cube. - Juri Schmidt; Holger Fröning; Ulrich Brüning 001 (MEMSYS, 2016)

Using Balanced Data Placement to Address I/O Contention in Production Environments. - Sarah Neuwirth; Feiyi Wang; Sarp Oral; Sudharshan Vazhkudai; James H. Rogers; Ulrich Brüning 001 (SBAC-PAD, 2016)

Automatic and Transparent Resource Contention Mitigation for Improving Large-Scale Parallel File System Performance. - Sarah Neuwirth; Feiyi Wang; Sarp Oral; Ulrich Brüning 001 (ICPADS, 2017)

Development of a RISC-V-Conform Fused Multiply-Add Floating-Point Unit. - Felix Kaiser; Stefan Kosnac; Ulrich Brüning 001 (Supercomput. Front. Innov., 2019)

BrainScaleS Large Scale Spike Communication using Extoll. - Tobias Thommes; Niels Buwen; Andreas Grübl; Eric Müller 001; Ulrich Brüning 001; Johannes Schemmel (CoRR, 2021)