Two-dimensional FIR filter architectures based on NTT. - Ulrich Kleine; Erik De Man (ICASSP, 1989)

A low-noise CMOS preamplifier operating at 4.2 K. - Ulrich Kleine; Johannes Bieger; Heinrich Seifert (IEEE J. Solid State Circuits, 1994)

Symbolic pole/zero calculation using SANTAFE. - Gerhard Nebel; Ulrich Kleine; Hans-Jörg Pfleiderer (IEEE J. Solid State Circuits, 1995)

A Novel Analog Module Generator Environment. - Markus Wolf 001; Ulrich Kleine; Bedrich J. Hosticka (ED&TC, 1996)

Large bandwidth BiCMOS operational amplifiers for SC video applications. - Gerhard Nebel; Ulrich Kleine; Hans-Jörg Pfleiderer (IEEE J. Solid State Circuits, 1996)

Application independent module generation in analog layouts. - Markus Wolf 001; Ulrich Kleine (ED&TC, 1997)

A Novel Design Assistant for Analog Circuits. - Markus Wolf 001; Ulrich Kleine; Frédéric Schafer (ASP-DAC, 1998)

Automatic Topology Optimization for Analog Module Generators. - Markus Wolf 001; Ulrich Kleine (DATE, 1998)

Low-voltage medium Q-SC filters for high frequency communication applications. - Ulrich Kleine; T. Pasch (ICECS, 1998)

A low voltage differential OpAmp with novel common mode feedback. - Thomas Pasch; Ulrich Kleine; R. Klinke (ICECS, 1998)

Reliability driven module generation for analog layouts. - Markus Wolf 001; Ulrich Kleine (ISCAS (6), 1999)

Area Optimization of Analog Circuits Considering Matching Constraints. - Christian Paulus; Ulrich Kleine; Roland Thewes (DATE, 2000)

A new design rule description for automated layout tools. - Lihong Zhang; Ulrich Kleine; Tobias Rudolph; Markus Wolf 001 (ICECS, 2000)

An efficient and precise design method to optimize device areas in mismatch and flicker-noise sensitive analog circuits. - Christian Paulus; Ralf Brederlow; Ulrich Kleine; Roland Thewes (ICECS, 2001)

A novel algorithm for detection of rapid approaching objects. - Falk Roewer; Ulrich Kleine (ICASSP, 2002)

Mismatch optimization for analog circuits using the DesignAssistant. - Ulrich Kleine; Lihong Zhang; Markus Wolf 001 (ICECS, 2002)

A genetic approach to analog module placement with simulated annealing. - Lihong Zhang; Ulrich Kleine (ISCAS (1), 2002)

A novel class of complementary folded-cascode opamps for low voltage. - Falk Roewer; Ulrich Kleine (IEEE J. Solid State Circuits, 2002)

A novel analog layout synthesis tool. - Lihong Zhang; Ulrich Kleine (ISCAS (5), 2004)

A programmable inductive position sensor interface circuit. - Falk Roewer; Ulrich Kleine; Klaus-Eberhard Salzwedel; Felix Mednikov; Chhrisitan Pfaffinger; Martin Sellen (Integr., 2004)

Macro-cell placement for analog physical designs using a hybrid genetic algorithm with simulated annealing. - Lihong Zhang; Rabin Raut; Yingtao Jiang; Ulrich Kleine; Yoohwan Kim (Integr. Comput. Aided Eng., 2005)

A hybrid evolutionary analogue module placement algorithm for integrated circuit layout designs. - Lihong Zhang; Rabin Raut; Yingtao Jiang; Ulrich Kleine; Yoohwan Kim (Int. J. Circuit Theory Appl., 2005)

Placement Algorithm in Analog-Layout Designs. - Lihong Zhang; Rabin Raut; Yingtao Jiang; Ulrich Kleine (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

An automated design tool for analog layouts. - Lihong Zhang; Ulrich Kleine; Yingtao Jiang (IEEE Trans. Very Large Scale Integr. Syst., 2006)

Design of a Linear Power Amplifier with +/-1.5V Power Supply Using ALADIN. - Björn Lipka; Ulrich Kleine (PATMOS, 2007)

Design of a complementary folded-cascode operational amplifier. - Björn Lipka; Ulrich Kleine; Christoph Scheytt; Klaus Schmalz (SoCC, 2009)