Evaluation and Comparison of Selected WSI Reconfiguration Architectures in Terms of Yield and Yield per Area. - Matthias Wesseling; Ulrich Ramacher; Karl Goser (Fehlertolerierende Rechensysteme, 1989)

Fine-grain system architectures for systolic emulation of neural algorithms. - Ulrich Ramacher; Wolfgang Raab (ASAP, 1990)

Mikroelektronische Realisierung von künstlichen neuronalen Netzen / Microelectronic Realizations of artificial neural networks. - Karl Goser; Ulrich Ramacher (it Inf. Technol., 1992)

SYNAPSE - A Neurocomputer that Synthesizes Neural Algorithms on a Parallel Systolic Engine. - Ulrich Ramacher (J. Parallel Distributed Comput., 1992)

Architecture and VLSI Design of a VLSI Neural Signal Processor. - Ulrich Ramacher; Jörg Beichter; Nico Brüls; Elisabeth Sicheneder (ISCAS, 1993)

Multiprocessor And Memory Architecture Of The Neurocomputer Synapse-1. - Ulrich Ramacher; Wolfgang Raab; Joachim K. Anlauf; J. A. Ulrich Hachmann; Jörg Beichter; Nico Brüls; Matthias Wesseling; Elisabeth Sicheneder; Reinhard Männer; Joachim Gläß; Andreas Wurz (Int. J. Neural Syst., 1993)

Recent Developments In Neurodynamics And Their Impact On The Design Of Neuro-Chips. - Ulrich Ramacher; Peter Schildberg (Int. J. Neural Syst., 1993)

Design of a general-purpose neural signal processor. - Jörg Beichter; Nico Brüls; Elisabeth Sicheneder; Ulrich Ramacher; Heinrich Klar (Neurocomputing, 1993)

Hamiltonian dynamics of neural networks. - Ulrich Ramacher (Neural Networks, 1993)

A general-purpose signal processor architecture for neurocomputing and preprocessing applications. - Ulrich Ramacher; Jörg Beichter; Nico Brüls (J. VLSI Signal Process., 1993)

SYNAPSE-1: a high-speed general purpose parallel neurocomputer system. - Ulrich Ramacher; Wolfgang Raab; J. A. Ulrich Hachmann; Jörg Beichter; Nico Brüls; Matthias Wesseling; Elisabeth Sicheneder; Joachim Gläß; Andreas Wurz; Reinhard Männer (IPPS, 1995)

SEE-1 - A Vision System for Use in Real World Environments. - Ulrich Ramacher (ICANN, 1996)

Prototyp eines Bildrechners für Echtzeitbildverarbeitung in Industrie- und Medientechnik. - Ulrich Ramacher; Wolfgang Raab; Wolfgang Kabatzke (PEARL, 1999)

Crosstalk noise in future digital CMOS circuits. - Chr. Werner; Ralf Goettsche; A. Wörner; Ulrich Ramacher (DATE, 2001)

An Analog VLSI Pulsed Neural Network for Image Segmentation Using Adaptive Connection Weights. - Arne Heittmann; Ulrich Ramacher; Daniel Matolin; Jörg Schreiter; René Schüffny (ICANN, 2002)

Application Specific Embedded Processors for Next Generation Communication Systems. - Ulrich Ramacher (ICCD, 2002)

Analog implementation for networks of integrate-and-fire neurons with adaptive local connectivity. - Jörg Schreiter; Ulrich Ramacher; Arne Heittmann; D. Matolini; René Schüffny (NNSP, 2002)

A programmable platform for software-defined radio. - Hans-Martin Blüthgen; Cyprian Grassmann; Wolfgang Raab; Ulrich Ramacher (SoC, 2003)

Correlation-based feature detection using pulsed neural networks. - Arne Heittmann; Ulrich Ramacher (NNSP, 2003)

A 100-GOPS Programmable Processor for Vehicle Vision Systems. - Wolfgang Raab; Nico Brüls; J. A. Ulrich Hachmann; Jens Harnisch; Ulrich Ramacher; Christian Sauer 001; Axel Techmer (IEEE Des. Test Comput., 2003)

100 GOPS vision processor for automotive applications. - Ulrich Ramacher; Nico Brüls; J. A. Ulrich Hachmann; Jens Harnisch; Wolfgang Raab; Axel Techmer (SIGARCH Comput. Archit. News, 2003)

Pulse coupled neural networks with adaptive synapses for image segmentation. - Jörg Schreiter; Ulrich Ramacher; Arne Heittmann; Daniel Matolin; René Schüffny (ARCS Workshops, 2004)

Cellular pulse-coupled neural network with adaptive weights for image segmentation and its VLSI implementation. - Jörg Schreiter; Ulrich Ramacher; Arne Heittmann; Daniel Matolin; René Schüffny (Image Processing: Algorithms and Systems, 2004)

A low-power memory hierarchy for a fully programmable baseband processor. - Wolfgang Raab; Hans-Martin Blüthgen; Ulrich Ramacher (WMPI, 2004)

Wireless platforms: GOPS for cents and MilliWatts. - Francine Bacchini; Jan M. Rabaey; Allan Cox; Frank Lane; Rudy Lauwereins; Ulrich Ramacher; David Witt (DAC, 2005)

Embedded vision platform for video surveillance systems. - Axel Techmer; Hans-Martin Blüthgen; Cyprian Grassmann; J. A. Ulrich Hachmann; Wolfgang Raab; Ulrich Ramacher (Electronic Imaging: Image and Video Communications and Processing, 2005)

Temporal Sound Processing by Cochlear Nucleus Octopus Neurons. - Werner Hemmert; Marcus Holmberg; Ulrich Ramacher (ICANN (1), 2005)

Automatic speech recognition with neural spike trains. - Marcus Holmberg; David Gelbart; Ulrich Ramacher; Werner Hemmert (INTERSPEECH, 2005)

3D Chip Stack Technology Using Through-Chip Interconnects. - Peter Benkart; Alexander Kaiser 002; Andreas Munding; Markus Bschorr; Hans-Jörg Pfleiderer; Erhard Kohn; Arne Heittmann; Holger Huebner; Ulrich Ramacher (IEEE Des. Test Comput., 2005)

Image Segmentation by Networks of Spiking Neurons. - Joachim M. Buhmann; Tilman Lange; Ulrich Ramacher (Neural Comput., 2005)

Challenges and prospects of SDR for mobile phones. - Ulrich Ramacher (ICCD, 2007)

Software-Defined Radio Prospects for Multistandard Mobile Phones. - Ulrich Ramacher (Computer, 2007)

Roundtable: Envisioning the Future for Multiprocessor SoC. - Ahmed Amine Jerraya; Olivier Franza; Markus Levy; Masao Nakaya; Pierre G. Paulin; Ulrich Ramacher; Deepu Talla; Wayne H. Wolf (IEEE Des. Test Comput., 2007)

Architecture and implementation of a Software-Defined Radio baseband processor. - Ulrich Ramacher; Wolfgang Raab; J. A. Ulrich Hachmann; Dominik Langen; Jörg Berthold; R. Kramer; A. Schackow; Cyprian Grassmann; Mirko Sauermann; P. Szreder; F. Capar; G. Obradovic; et al. (ISCAS, 2011)