Test Architecture for Systolic Array of Edge-Based AI Accelerator. - Umair Saeed Solangi; Muhammad Ibtesam; Muhammad Adil Ansari; Jinuk Kim; Sungju Park (IEEE Access, 2021)

Master-slave based test cost reduction method for DNN accelerators. - Umair Saeed Solangi; Muhammad Ibtesam; Sungju Park (IEICE Electron. Express, 2021)

Time multiplexed LBIST for in-field testing of automotive AI accelerators. - Umair Saeed Solangi; Muhammad Ibtesam; Sungju Park (IEICE Electron. Express, 2021)

Highly Efficient Test Architecture for Low-Power AI Accelerators. - Muhammad Ibtesam; Umair Saeed Solangi; Jinuk Kim; Muhammad Adil Ansari; Sungju Park (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Reliable Test Architecture With Test Cost Reduction for Systolic-Based DNN Accelerators. - Muhammad Ibtesam; Umair Saeed Solangi; Jinuk Kim; Muhammad Adil Ansari; Sungju Park (IEEE Trans. Circuits Syst. II Express Briefs, 2022)