An 8-core, 64-thread, 64-bit power efficient sparc soc (niagara2). - Timothy Johnson; Umesh Nawathe (ISPD, 2007)

An 8-Core 64-Thread 64b Power-Efficient SPARC SoC. - Umesh Gajanan Nawathe; Mahmudul Hassan; Lynn Warriner; King C. Yen; Bharat Upputuri; David Greenhill; Ashok Kumar; Heechoul Park (ISSCC, 2007)

Implementation of an 8-Core, 64-Thread, Power-Efficient SPARC Server on a Chip. - Umesh Gajanan Nawathe; Mahmudul Hassan; King C. Yen; Ashok Kumar; Aparna Ramachandran; David Greenhill (IEEE J. Solid State Circuits, 2008)

3.6GHz 16-core SPARC SoC processor in 28nm. - Jason Hart; Steve Butler; Hoyeol Cho; Yuefei Ge; Gregory Gruber; Dawei Huang; Changku Hwang; Daisy Jian; Timothy Johnson; Georgios K. Konstadinidis; Lance Kwong; Robert P. Masleid; et al. (ISSCC, 2013)

A 3.6 GHz 16-Core SPARC SoC Processor in 28 nm. - Jason Hart; Hoyeol Cho; Yuefei Ge; Gregory Gruber; Dawei Huang; Changku Hwang; Daisy Jian; Timothy Johnson; Georgios K. Konstadinidis; Venkatram Krishnaswamy; Lance Kwong; Robert P. Masleid; et al. (IEEE J. Solid State Circuits, 2014)