A Transistor Reordering Technique for Gate Matrix Layout. - Uminder Singh; C. Y. Roger Chen (DAC, 1990)

Optimal cell generation for dual independent layout styles. - Bradley S. Carlson; C. Y. Roger Chen; Uminder Singh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

From logic to symbolic layout for gate matrix. - Uminder Singh; C. Y. Roger Chen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992)

Optimal algorithms for bubble sort based non-Manhattan channel routing. - C. Y. Roger Chen; Cliff Yungchin Hou; Uminder Singh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994)