Benchmarks for Interconnect Parasitic Resistance and Capacitance. - N. S. Nagaraj; Tom Bonifield; Abha Singh; Frank Cano; Usha Narasimha; Mak Kulkarni; Poras T. Balsara; Cyrus D. Cantrell (ISQED, 2003)

A 800 MHz System-on-Chip for Wireless Infrastructure Applications. - Sanjive Agarwala; Paul Wiley; Arjun Rajagopal; Anthony M. Hill; Raguram Damodaran; Lewis Nardini; Tim Anderson; Steven Mullinnix; Jose Flores; Heping Yue; Abhijeet Chachad; John Apostol; et al. (VLSI Design, 2004)

BEOL variability and impact on RC extraction. - N. S. Nagaraj; Tom Bonifield; Abha Singh; Clive Bittlestone; Usha Narasimha; Viet Le; Anthony M. Hill (DAC, 2005)

Statistical Analysis of Capacitance Coupling Effects on Delay and Noise. - Usha Narasimha; Binu Abraham; N. S. Nagaraj (ISQED, 2006)

SmartExtract: Accurate Capacitance Extraction for SOC Designs. - Usha Narasimha; Anthony M. Hill; N. S. Nagaraj (VLSI Design, 2006)

A 65nm C64x+ Multi-Core DSP Platform for Communications Infrastructure. - Sanjive Agarwala; Arjun Rajagopal; Anthony M. Hill; Mayur Joshi; Steven Mullinnix; Timothy Anderson; Raguram Damodaran; Lewis Nardini; Paul Wiley; Peter Groves; John Apostol; Michael Gill; et al. (ISSCC, 2007)