Regular Structures and Testing: RCC-Adders. - Bernd Becker 001; Uwe Sparmann (AWOC, 1988)

Design and Test of a Pattern Matching Circuit. - Uwe Sparmann (J. Inf. Process. Cybern., 1988)

A graphical system for hierarchical specifications and checkups of VLSI circuits. - Bernd Becker 001; Thomas Burch; Günter Hotz; D. Kiel; Reiner Kolla; Paul Molitor; Hans-Georg Osthof; Gisela Pitsch; Uwe Sparmann (EURO-DAC, 1990)

Structure based methods for parallel pattern fault simulation in combinational circuits. - Bernd Becker 001; Ralf Hahn; Rolf Krieger; Uwe Sparmann (EURO-DAC, 1991)

A uniform test approach for RCC-adders. - Bernd Becker 001; Uwe Sparmann (Fundam. Informaticae, 1991)

Computations over Finite Monoids and their Test Complexity. - Bernd Becker 001; Uwe Sparmann (Theor. Comput. Sci., 1991)

Strukturbasierte Testmethoden für arithmetische Schaltkreise. - Uwe Sparmann (1991)

Derivation of High Quality Tests for Large Heterogeneous Circuits: Floating-Point Operations. - Uwe Sparmann (Informatik, 1992)

On the check base selection problem for fast adders. - Uwe Sparmann (VTS, 1993)

A Hierarchical Environment for Interactive Test Engineering. - Thomas Burch; Joachim Hartmann; Günter Hotz; M. Krallmann; U. Nikolaus; Sudhakar M. Reddy; Uwe Sparmann (ITC, 1994)

Two-Layer Wiring with Pin Preassignments is Easier if the Power Supply Nets are Already Generated. - Paul Molitor; Uwe Sparmann; Dorothea Wagner (VLSI Design, 1994)

Fast Identification of Robust Dependent Path Delay Faults. - Uwe Sparmann; D. Luxenburger; Kwang-Ting Cheng; Sudhakar M. Reddy (DAC, 1995)

On the testability of iterative logic arrays. - Bernd Becker 001; Ralf Hahn; Joachim Hartmann; Uwe Sparmann (Integr., 1995)

Minimal Delay Test Sets for Unate Gate Networks. - Uwe Sparmann; Holger Müller; Sudhakar M. Reddy (Asian Test Symposium, 1996)

Local Transformations and Robust Dependent Path Delay. - Harry Hengster; Uwe Sparmann; Bernd Becker 001; Sudhakar M. Reddy (ITC, 1996)

On minimizing the number of test points needed to achieve complete robust path delay fault testability. - Prasanti Uppaluri; Uwe Sparmann; Irith Pomeranz (VTS, 1996)

On the effectiveness of residue code checking for parallel two's complement multipliers. - Uwe Sparmann; Sudhakar M. Reddy (IEEE Trans. Very Large Scale Integr. Syst., 1996)

Improving Path Delay Fault Testability by Path Removal. - Uwe Sparmann; Lars Köller (VTS, 1998)

Universal delay test sets for logic networks. - Uwe Sparmann; Holger Müller; Sudhakar M. Reddy (IEEE Trans. Very Large Scale Integr. Syst., 1999)