Hybrid InGaAs/SiGe CMOS circuits with 2D and 3D monolithic integration. - V. Deshpande; Herwig Hahn; V. Djara; E. O'Connor; Daniele Caimi; Marilyne Sousa; Jean Fompeyrine; L. Czornomaz (ESSDERC, 2017)

Scaling CMOS beyond Si FinFET: an analog/RF perspective. - Bertrand Parvais; Geert Hellings; Marko Simicic; Pieter Weckx; Jérôme Mitard; Doyoung Jang; V. Deshpande; B. van Liempc; Anabela Veloso; A. Vandooren; Niamh Waldron; Piet Wambacq; et al. (ESSDERC, 2018)

Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling. - A. Vandooren; Liesbeth Witters; Jacopo Franco; Arindam Mallik; Bertrand Parvais; Z. Wu; Amey Walke; V. Deshpande; E. Rosseel; Andriy Hikavyy; W. Li; L. Peng; et al. (ICICDT, 2018)