A 26 Gb/s Echo-Cancellation Based Simultaneous Bidirectional Transceiver in 65 nm CMOS. - V. K. Surya; Suraj Kumar Prusty; Nijwm Wary (ISCAS, 2023)

A High-Speed Charge-Injection based Double Tail Latch for Decision Feedback Equalizer (DFE). - Suraj Kumar Prusty; V. K. Surya; Nijwm Wary (NEWCAS, 2023)

Energy Efficient Integrated Summer and Latch-Based DFE With Reduced Tap Loading. - Suraj Kumar Prusty; V. K. Surya; Nijwm Wary (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Energy Efficient Resistor-Transconductor Hybrid-Based Full-Duplex Transceiver for Serial Link. - V. K. Surya; Suraj Kumar Prusty; Bibhu Datta Sahoo 002; Nijwm Wary (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

A Hybrid SST-CML Full Duplex Simultaneous Bi-Directional Signaling Link. - Sree Kumar R. G.; V. K. Surya; Nijwm Wary; Bibhu Datta Sahoo 003 (ISCAS, 2025)

A Replica Driverless Common/Differential Mode Hybrid for Full-Duplex Signaling in Serial Links. - Pankaj Kumar; V. K. Surya; Sree Kumar R. G.; Bibhu Datta Sahoo 003; Nijwm Wary (ISCAS, 2025)

Energy Efficient Voltage-Mode Simultaneous Bidirectional Transceiver for Serial Links. - Ankit Yadav; V. K. Surya; Sree Kumar R. G.; Bibhu Datta Sahoo 003; Nijwm Wary (ISCAS, 2025)

Pin Efficient Tri-Level Based Inductive Coupling Transceiver for 3D ICs. - Soumojit Bakshi; V. K. Surya; Nijwm Wary (VLSID, 2025)