Design of Artificial Neuron Network with Synapse Utilizing Hybrid CMOS Transistors with Memristor for Low Power Applications. - V. Keerthy Rai; R. Sakthivel 002 (J. Circuits Syst. Comput., 2020)

Neuron Network with a Synapse of CMOS transistor and Anti-Parallel Memristors for Low power Implementations. - V. Keerthy Rai; R. Sakthivel 002 (J. Circuits Syst. Comput., 2022)