Design of Arithmetic Logic Unit Using Hybrid Power Reduction Methodologies For Super Computer Applications. - S. Sasikala; Balambigai Subramanian; P. Sivaranjani; V. Udhayasuriyan (ICCCNT, 2023)

Two Stage Step-Size Adaptive Filter Design for ECG Denoising. - S. Sasikala; P. Sivaranjani; T. Meeradevi; V. Udhayasuriyan (ICCCNT, 2024)