Using the ES2 library and SILOS simulator in the development of a single chip with three processors and analog IO. - Juan A. Montiel-Nelson; Valentin de Armas; D. Q. M. Fay; Antonio Núñez (PDP, 1993)

An OCCAM circle generator program implemented in VLSI. - Juan A. Montiel-Nelson; Valentin de Armas; D. Q. M. Fay (Microprocess. Microprogramming, 1993)

A Cell and Macrocell Compiler for GaAs VLSI Full-Custom Design. - Juan A. Montiel-Nelson; V. de Armas; Roberto Sarmiento; Antonio Núñez (DATE, 1998)

OLYMPO: a GaAs compiler for VLSI design. - Juan A. Montiel-Nelson; Valentin de Armas; Roberto Sarmiento; Antonio Núñez (ICECS, 1998)

A CORDIC processor for FFT computation and its implementation using gallium arsenide technology. - Roberto Sarmiento; V. de Armas; José Francisco López; Juan A. Montiel-Nelson; Antonio Núñez (IEEE Trans. Very Large Scale Integr. Syst., 1998)

High Speed GaAs Subsystem Design using Feed Through Logic. - Juan A. Montiel-Nelson; Saeid Nooshabadi; V. de Armas; Roberto Sarmiento; Antonio Núñez (DATE, 1999)

A Compact Layout Technique for Reducing Switching Current Effects in High Speed Circuits. - Juan A. Montiel-Nelson; V. de Armas; Roberto Sarmiento; Antonio Núñez (ISQED, 2001)

Round-trip delay effect on iterative request-grant-accept scheduling algorithms for virtual output queue switches. - Félix Tobajas; Roberto Esper-Chaín; Valentin de Armas; José Francisco López; Roberto Sarmiento (GLOBECOM, 2002)

Split-engine packet classification: a novel approach to multi-field packet classification on high performance routers with QoS support. - Félix Tobajas; V. Canero; Valentin de Armas; Roberto Esper-Chaín; Rubén Arteaga; Roberto Sarmiento (GLOBECOM, 2004)

Low cost efficient architecture for H.264 motion estimation. - Sebastián López; Félix Tobajas; A. Villar; V. de Armas; José Francisco López; Roberto Sarmiento (ISCAS (1), 2005)

Experimental gigabit multidrop serial backplane for high speed digital systems. - Félix Tobajas; Roberto Esper-Chaín; Óscar Tubio; Rubén Arteaga; V. de Armas; Roberto Sarmiento (ISCAS (4), 2005)

A gigabit multidrop serial backplane for high-speed digital systems based on asymmetrical power splitter. - Roberto Esper-Chaín; Félix Tobajas; Óscar Tubio; Rubén Arteaga; Valentin de Armas; Roberto Sarmiento (IEEE Trans. Circuits Syst. II Express Briefs, 2005)

GMDS: Hardware implementation of novel real output queuing architecture. - Rubén Arteaga; Félix Tobajas; Roberto Esper-Chaín; V. de Armas; Roberto Sarmiento (DATE, 2008)

An Efficient Double-Filter Hardware Architecture for H.264/AVC Deblocking Filtering. - Félix Tobajas; Gustavo M. Callicó; Pedro A. Pérez; Valentin de Armas; Roberto Sarmiento (IEEE Trans. Consumer Electron., 2008)

Medical Diagnosis Improvement Through Image Quality Enhancement Based on Super-Resolution. - Lara G. Villanueva; Gustavo M. Callicó; Félix Tobajas; Sebastián López; Valentin de Armas; José Francisco López; Roberto Sarmiento (DSD, 2010)

Video super resolution algorithm implemented on a low-cost NoC-based MPSoC platform. - Garbi Singla; Félix Tobajas; Valentin de Armas (ReConFig, 2013)

Supporting students with special needs at university through peer mentoring. - Félix Tobajas; Valentin de Armas; Ma Dolores Cabello; Fernando Grijalvo (EDUCON, 2014)

Hardware platform for wide-area vehicular sensor networks with mobile nodes. - Ignacio Del Castillo; Félix Tobajas; Roberto Esper-Chaín; Valentin de Armas (Veh. Commun., 2016)

Super-resolution with selective filter based on adaptive window and variable macro-block size. - Eduardo Quevedo; Luis Sánchez; Gustavo M. Callicó; Félix Tobajas; Jesús de la Cruz; V. de Armas; Roberto Sarmiento (J. Real Time Image Process., 2018)