Efficient Pattern Mapping for Deterministic Logic BIST. - Valentin Gherman; Hans-Joachim Wunderlich; Harald P. E. Vranken; Friedrich Hapke; Michael Wittke; Michael Garbers (ITC, 2004)

Implementing a Scheme for External Deterministic Self-Test. - Abdul Wahid Hakmi; Hans-Joachim Wunderlich; Valentin Gherman; Michael Garbers; Jürgen Schlöffel (VTS, 2005)

Synthesis of irregular combinational functions with large don't care sets. - Valentin Gherman; Hans-Joachim Wunderlich; R. D. Mascarenhas; Jürgen Schlöffel; Michael Garbers (ACM Great Lakes Symposium on VLSI, 2007)

Deterministic logic BIST for transition fault testing. - Valentin Gherman; Hans-Joachim Wunderlich; Jürgen Schlöffel; Michael Garbers (IET Comput. Digit. Tech., 2007)

System-level hardware-based protection of memories against soft-errors. - Valentin Gherman; Samuel Evain; Mickael Cartron; Nathaniel Seymour; Yannick Bonhomme (DATE, 2009)

Programmable restricted SEC codes to mask permanent faults in semiconductor memories. - Samuel Evain; Yannick Bonhomme; Valentin Gherman (IOLTS, 2010)

Error prediction based on concurrent self-test and reduced slack time. - Valentin Gherman; J. Massas; Samuel Evain; Stéphane Chevobbe; Yannick Bonhomme (DATE, 2011)

Generalized parity-check matrices for SEC-DED codes with fixed parity. - Valentin Gherman; Samuel Evain; Nathaniel Seymour; Yannick Bonhomme (IOLTS, 2011)

Programmable extended SEC-DED codes for memory errors. - Valentin Gherman; Samuel Evain; Fabrice Auzanneau; Yannick Bonhomme (VTS, 2011)

Memory reliability improvements based on maximized error-correcting codes. - Valentin Gherman; Samuel Evain; Yannick Bonhomme (ETS, 2012)

Scan design with shadow flip-flops for low performance overhead and concurrent delay fault detection. - Sébastien Sarrazin; Samuel Evain; Lirida Alves de Barros Naviner; Yannick Bonhomme; Valentin Gherman (DATE, 2013)

Error-correction schemes with erasure information for fast memories. - Samuel Evain; Valentin Gherman (ETS, 2013)

Memory Reliability Improvement Based on Maximized Error-Correcting Codes. - Valentin Gherman; Samuel Evain; Yannick Bonhomme (J. Electron. Test., 2013)

Shadow-scan design with low latency overhead and in-situ slack-time monitoring. - Sébastien Sarrazin; Samuel Evain; Ivan Miro Panades; Alexandre Valentian; Suresh Pajaniradja; Lirida Alves de Barros Naviner; Valentin Gherman (ETS, 2014)

Flip-flop selection for in-situ slack-time monitoring based on the activation probability of timing-critical paths. - Sébastien Sarrazin; Samuel Evain; Ivan Miro Panades; Lirida Alves de Barros Naviner; Valentin Gherman (IOLTS, 2014)

Error Correction Schemes with Erasure Information for Fast Memories. - Samuel Evain; Valentin Savin; Valentin Gherman (J. Electron. Test., 2014)

Refresh frequency reduction of data stored in SSDs based on A-timer and timestamps. - Marcelino Seif; Emna Farjallah; Franck Badets; Emna Chabchoub; Christophe Layer; Jean-Marc Armani; Francis Joffre; Costin Anghel; Luigi Dilillo; Valentin Gherman (ETS, 2017)

Improvement of the tolerated raw bit error rate in NAND flash-based SSDs with the help of embedded statistics. - Valentin Gherman; Emna Farjallah; Jean-Marc Armani; Marcelino Seif; Luigi Dilillo (ITC, 2017)

Is aproximate computing suitable for selective hardening of arithmetic circuits? - Bastien Deveautour; Arnaud Virazel; Patrick Girard 001; Serge Pravossoudovitch; Valentin Gherman (DTIS, 2018)

Evaluation of the temperature influence on SEU vulnerability of DICE and 6T-SRAM cells. - Emna Farjallah; Valentin Gherman; Jean-Marc Armani; Luigi Dilillo (DTIS, 2018)

Binary Linear ECCs Optimized for Bit Inversion in Memories with Asymmetric Error Probabilities. - Valentin Gherman; Samuel Evain; Bastien Giraud (DATE, 2020)

On Using Approximate Computing to Build an Error Detection Scheme for Arithmetic Circuits. - Bastien Deveautour; Arnaud Virazel; Patrick Girard 001; Valentin Gherman (J. Electron. Test., 2020)

Benefits of Design Assist Techniques on Performances and Reliability of a RRAM Macro. - Bastien Giraud; Sebastien Ricavy; Yasser Moursy; Cyrille Laffond; Ilan Sever; Valentin Gherman; Manuel Pezzin; Florent Lepin; Mariam Diallo; Khadija Zenati; Sylvain Dumas; Maxim Vershkov; et al. (IMW, 2023)

Sequential Decoders for Binary Linear Block ECCs. - Valentin Gherman; Cyrille Laffond (VTS, 2024)

Smart Write Algorithm to Enhance Performances and Reliability of an RRAM Macro. - Bastien Giraud; Sebastien Ricavy; Cyrille Laffond; Ilan Sever; Valentin Gherman; Florent Lepin; Mariam Diallo; Khadija Zenati; Sylvain Dumas; Olivier Guille; Maxim Vershkov; Alessandro Bricalli; et al. (IEEE J. Solid State Circuits, 2024)