VLSI arrays implementing parallel line-drawing algorithms. - Valeriu Beiu (Parcella, 1988)

Efficient decomposition of comparison and its applications. - Valeriu Beiu; J. A. Peperstraete; Joos Vandewalle; Rudy Lauwereins (ESANN, 1993)

VLSI complexity reduction by piece-wise approximation of the sigmoid function. - Valeriu Beiu; J. A. Peperstraete; Joos Vandewalle; Rudy Lauwereins (ESANN, 1994)

Closse Approximations of Sigmoid Functions by Sum of Step for VLSI Implementation of Neural Networks. - Valeriu Beiu; J. A. Peperstraete; Joos Vandewalle; Rudy Lauwereins (Sci. Ann. Cuza Univ., 1994)

VLSI Optimal Neural Network Learning Algorithm. - Valeriu Beiu; John G. Taylor (ICANNGA, 1995)

Optimal Mapping of Neural Networks onto FPGA's - A New Constructive Algorithm -. - Valeriu Beiu; John G. Taylor (IWANN, 1995)

Density Estimation as a Preprocessing Step for Constructive Algorithms. - J. C. Lemm; Valeriu Beiu; John G. Taylor (SNN Symposium on Neural Networks, 1995)

On the Circuit Complexity of Sigmoid Feedforward Neural Networks. - Valeriu Beiu; John G. Taylor (Neural Networks, 1996)

Enhanced lower entropy bounds with application to constructive learning. - Valeriu Beiu (EUROMICRO, 1997)

Tight Bounds on the Size of Neural Networks for Classification Problems. - Valeriu Beiu; Thierry de Pauw (IWANN, 1997)

On limited fan-in optimal neural networks. - Valeriu Beiu; Sorin Draghici; Hanna E. Makaruk (SBRN, 1997)

Implementing size-optimal discrete neural networks require analog circuitry. - Valeriu Beiu (EUSIPCO, 1998)

2D Neural Hardware versus 3D Biological Ones. - Valeriu Beiu (NC, 1998)

On Kolmogorov's Superpositions and Boolean Functions. - Valeriu Beiu (SBRN, 1998)

On the circuit and VLSI complexity of threshold gate COMPARISON. - Valeriu Beiu (Neurocomputing, 1998)

Deeper Sparsely Nets can be Optimal. - Valeriu Beiu; Hanna E. Makaruk (Neural Process. Lett., 1998)

Neural Addition and Fibonacci Numbers. - Valeriu Beiu (IWANN (2), 1999)

A Constructive Approach to Calculating Lower Entropy Bounds. - Valeriu Beiu; Sorin Draghici; Thierry de Pauw (Neural Process. Lett., 1999)

Constructive Threshold Logic Addition A Synopsis of the Last Decade. - Valeriu Beiu (ICANN, 2003)

Review of Capacitive Threshold Gate Implementations. - Valeriu Beiu; Maria J. Avedillo; José M. Quintana (ICANN, 2003)

Fuzzy ARTMAP with relevance factor. - Razvan Andonie; Lucian M. Sasu; Valeriu Beiu (IJCNN, 2003)

A survey of perceptron circuit complexity results. - Valeriu Beiu (IJCNN, 2003)

Split-Precharge Differential Noise-Immune Threshold Logic Gate (SPD-NTL). - Suryanarayana Tatapudi; Valeriu Beiu (IWANN (2), 2003)

A Modified Fuzzy ARTMAP Architecture for Incremental Learning Function Approximation. - Razvan Andonie; Lucian Mircea Sasu; Valeriu Beiu (Neural Networks and Computational Intelligence, 2003)

On Existential and Constructive Neural Complexity Results. - Valeriu Beiu (Neural Networks and Computational Intelligence, 2003)

Review of Differential Threshold Gate Implementations. - Valeriu Beiu; José M. Quintana; Maria J. Avedillo (Neural Networks and Computational Intelligence, 2003)

VLSI implementations of threshold logic-a comprehensive survey. - Valeriu Beiu; José M. Quintana; Maria J. Avedillo (IEEE Trans. Neural Networks, 2003)

A Novel Highly Reliable Low-Power Nano Architecture When von Neumann Augments. - Valeriu Beiu (ASAP, 2004)

Optimal Practical Perceptron Addition Application to Single Electron Technology. - Valeriu Beiu; Mawahib H. Sulieman (ESA/VLSI, 2004)

A Novel Segmented Parabolic Sine Approximation for Direct Digital Frequency Synthesizers. - David J. Betowski; Daniel Dwyer; Valeriu Beiu (ESA/VLSI, 2004)

A charge recycling differential noise immune perceptron. - Jabulani Nyathi; Valeriu Beiu; Suryanarayana Tatapudi; David J. Betowski (IJCNN, 2004)

Characterization of a 16-bit threshold logic single-electron technology adder. - Mawahib H. Sulieman; Valeriu Beiu (ISCAS (3), 2004)

On the Advantages of Serial Architectures for Low-Power Reliable Computations. - Valeriu Beiu; Snorre Aunet; Jabulani Nyathi; Ray Robert Rydberg III; Asbjørn Djupdal (ASAP, 2005)

Ultra low power fault tolerant neural inspired CMOS logic. - Snorre Aunet; Valeriu Beiu (IJCNN, 2005)

Ultra Low-Power Neural Inspired Addition: When Serial Might Outperform Parallel Architectures. - Valeriu Beiu; Asbjørn Djupdal; Snorre Aunet (IWANN, 2005)

Using Kolmogorov Inspired Gates for Low Power Nanoelectronics. - Valeriu Beiu; Artur Zawadski; Razvan Andonie; Snorre Aunet (IWANN, 2005)

Femto Joule Switching for Nano Electronics. - Valeriu Beiu; Jabulani Nyathi; Snorre Aunet; Mawahib H. Sulieman (AICCSA, 2006)

Multiplexing Schemes in Single-Electron Technology. - Mawahib H. Sulieman; Valeriu Beiu (AICCSA, 2006)

Gate Failures Effectively Shape Multiplexing. - Valeriu Beiu; Walid Ibrahim; Y. A. Alkhawwar; Mawahib H. Sulieman (DFT, 2006)

Long Live Small Fan-in Majority Gates Their Reign Looks Like Coming! - Walid Ibrahim; Valeriu Beiu (ASAP, 2007)

Grand Challenges of Nanoelectronics and Possible Architectural Solutions: What Do Shannon, von Neumann, Kolmogorov, and Feynman Have to do with Moore. - Valeriu Beiu (ISMVL, 2007)

What von Neumann Did Not Say About Multiplexing Beyond Gate Failures - The Gory Details. - Valeriu Beiu; Walid Ibrahim; Sanja Lazarova-Molnar (IWANN, 2007)

Serial Addition: Locally Connected Architectures. - Valeriu Beiu; Snorre Aunet; Jabulani Nyathi; Ray Robert Rydberg III; Walid Ibrahim (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Does the brain really outperform Rent's rule? - Valeriu Beiu; Walid Ibrahim (ISCAS, 2008)

On brain-inspired connectivity and hybrid network topologies. - Basheer A. M. Madappuram; Valeriu Beiu; Peter M. Kelly; Liam McDaid (NANOARCH, 2008)

On brain-inspired hybrid topologies for nano-architectures - a Rent's rule approach -. - Valeriu Beiu; Basheer A. M. Madappuram; T. Martin McGinnity (ICSAMOS, 2008)

On Wires Holding a Handful of Electrons. - Valeriu Beiu; Walid Ibrahim; Rafic Z. Makki (NanoNet, 2009)

On Two-Layer Hierarchical Networks How Does the Brain Do This? - Valeriu Beiu; Basheer A. M. Madappuram; Peter M. Kelly; Liam McDaid (NanoNet, 2009)

A Bayesian-Based EDA Tool for Nano-circuits Reliability Calculations. - Walid Ibrahim; Valeriu Beiu (NanoNet, 2009)

Reduced Interconnects in Neural Networks Using a Time Multiplexed Architecture Based on Quantum Devices. - Peter M. Kelly; Fergal Tuffy; Valeriu Beiu; Liam McDaid (NanoNet, 2009)

Device-Level Majority von Neumann Multiplexing. - Valeriu Beiu; Walid Ibrahim; Sanja Lazarova-Molnar (Encyclopedia of Artificial Intelligence, 2009)

A Position-Based Broadcast Relay Approach in Mobile Vehicle-to-Vehicle Network. - Liren Zhang; Hesham El-Sayed; Valeriu Beiu (ICWN, 2010)

On NOR-2 von Neumann multiplexing. - Walid Ibrahim; Valeriu Beiu; Azam Beg (IDT, 2010)

On axon-inspired communications. - Valeriu Beiu; Walid Ibrahim; Azam Beg; Liren Zhang; Mihai Tache (ECCTD, 2011)

Exploring retrograde signaling via astrocytes as a mechanism for self repair. - John J. Wade; Liam McDaid; Jim Harkin; Vincenzo Crunelli; J. A. Scott Kelso; Valeriu Beiu (IJCNN, 2011)

On Two-Layer Brain-Inspired Hierarchical Topologies - A Rent's Rule Approach -. - Valeriu Beiu; Basheer A. M. Madappuram; Peter M. Kelly; Liam McDaid (Trans. High Perform. Embed. Archit. Compil., 2011)

Using Bayesian Networks to Accurately Calculate the Reliability of Complementary Metal Oxide Semiconductor Gates. - Walid Ibrahim; Valeriu Beiu (IEEE Trans. Reliab., 2011)

A Mathematical Model for the Analysis of the Johnson-Nyquist Thermal Noise on the Reliability in Nano-Communications. - Pietro Santagati; Valeriu Beiu (BIONETICS, 2012)

SYMONE Project: Synaptic Molecular Networks for Bio-Inspired Information Processing. - Göran Wendin; Dominique Vuillaume; Michel Calame; Shlomo Yitzchaik; Christian Gamrat; Gianaurelio Cuniberti; Valeriu Beiu (Int. J. Unconv. Comput., 2012)

GREDA: A Fast and More Accurate Gate Reliability EDA Tool. - Walid Ibrahim; Valeriu Beiu; Azam Beg (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012)

Optimum Reliability Sizing for Complementary Metal Oxide Semiconductor Gates. - Walid Ibrahim; Valeriu Beiu; Azam Beg (IEEE Trans. Reliab., 2012)

On Schmitt trigger and other inverters. - Walid Ibrahim; Valeriu Beiu; Mihai Tache; Fekri Kharbash (ICECS, 2013)

Using body bias when upsizing length for maximizing the static noise margins of CMOS gates. - Fekri Kharbash; Valeriu Beiu; Mihai Tache; Walid Ibrahim (ICECS, 2013)

Enabling sizing for enhancing the static noise margins. - Valeriu Beiu; Azam Beg; Walid Ibrahim; Fekri Kharbash; Massimo Alioto (ISQED, 2013)

Deciphering the Reliability Scheme of the Neurons - One Ion Channel at a Time. - Valeriu Beiu; Leonard Daus (BICT, 2014)

Why hybridize NEMS with CMOS? - Mihai Tache; Valeriu Beiu; Tsu-Jae King Liu (ICECS, 2014)

Enhancing the Static Noise Margins by Upsizing Length for Ultra-Low Voltage/Power/Energy Gates. - Mihai Tache; Valeriu Beiu; Walid Ibrahim; Fekri Kharbash; Massimo Alioto (J. Low Power Electron., 2014)

Reliability schemes for nano-communications. - Valeriu Beiu; Leonard Daus (ECCTD, 2015)

Statistical analysis of static noise margins. - Valeriu Beiu; Mihai Tache (ECCTD, 2015)

Reliability bounds for two dimensional consecutive systems. - Valeriu Beiu; Leonard Daus (Nano Commun. Networks, 2015)

Lower and Upper Reliability Bounds for Consecutive-k-Out-of-n: F Systems. - Leonard Daus; Valeriu Beiu (IEEE Trans. Reliab., 2015)

Novel Method for Neurodegenerative Disorders Screening Patients Using Hurst Coefficients on EEG Delta Rhythm. - Roxana Toderean; Oana Geman; Iuliana Chiuchisan; Valentina Emilia Balas; Valeriu Beiu (SOFA (1), 2016)

On hammock networks - sixty years after. - Simon Robin Cowell; Leonard Daus; Valeriu Beiu; Philippe Poulin (DTIS, 2017)

Vulnerabilities of the McEliece Variants Based on Polar Codes. - Vlad Dragoi; Valeriu Beiu; Dominic Bucerzan (SecITC, 2018)

On Posets for Reliability: How Fine Can They Be? - Valeriu Beiu; Simon Robin Cowell; Vlad-Florin Dragoi (SOFA (1), 2018)

On the Exact Reliability Enhancements of Small Hammock Networks. - Simon Robin Cowell; Valeriu Beiu; Leonard Daus; Philippe Poulin (IEEE Access, 2018)

How Reliable are Compositions of Series and Parallel Networks Compared with Hammocks? - Vlad Dragoi; Simon Robin Cowell; Valeriu Beiu; Sorin Hoara; Pastorel Gaspar (Int. J. Comput. Commun. Control, 2018)

Why Reliability for Computing Needs Rethinking. - Valeriu Beiu; Vlad-Florin Dragoi; Roxana-Mariana Beiu (ICRC, 2020)

A Tale of Catalan Triangles: Counting Lattice Paths. - Leonard Daus; Marilena Jianu; Roxana-Mariana Beiu; Valeriu Beiu (SOFA, 2020)

Consecutive Systems Asymptotic Threshold Behaviors. - Vlad-Florin Dragoi; Valeriu Beiu (SOFA, 2020)

Tight Bounds on the Coeffcients of Consecutive k-out-of-n: F Systems. - Vlad-Florin Dragoi; Simon Robin Cowell; Valeriu Beiu (CoRR, 2020)

Studying the Binary Erasure Polarization Subchannels Using Network Reliability. - Vlad Dragoi; Valeriu Beiu (IEEE Commun. Lett., 2020)

Optimal design of linear consecutive systems. - Andrea-Claudia Beiu; Roxana-Mariana Beiu; Valeriu Beiu (NANOCOM, 2022)

Consecutive k-out-of-n: F Systems Have Unbounded Roots. - Marilena Jianu; Leonard Daus; Vlad-Florin Dragoi; Valeriu Beiu (CoRR, 2022)

Fast reliability ranking of matchstick minimal networks. - Vlad-Florin Dragoi; Valeriu Beiu (Networks, 2022)

On a Surface Associated with Pascal's Triangle. - Valeriu Beiu; Leonard Daus; Marilena Jianu; Adela Mihai; Ion Mihai (Symmetry, 2022)

Survey of Cubic Fibonacci Identities When Cuboids Carry Weight. - Mariana Nagy; Simon Robin Cowell; Valeriu Beiu (Int. J. Comput. Commun. Control, 2022)

Reliability polynomials of consecutive-k-out-of-n:Fsystems have unbounded roots. - Marilena Jianu; Leonard Daus; Vlad-Florin Dragoi; Valeriu Beiu (Networks, 2023)

Which Coefficients Matter Most - Consecutive $k$-Out-of-$n$:$F$ Systems Revisited. - Vlad-Florin Dragoi; Valeriu Beiu (IEEE Trans. Reliab., 2024)