Design of Virtual Digital Controllers Based on Dynamically Reconfigurable FPGAs. - Valery Sklyarov; Nuno Lau; Ricardo Sal Monteiro; Andreia Melo; Arnaldo S. R. Oliveira; Konstantin Kondratjuk (EUROMICRO, 1998)

Integrated Development Environment for Logic Synthesis Based on Dynamically Reconfigurable FPGAs. - Valery Sklyarov; Ricardo Sal Monteiro; Nuno Lau; Andreia Melo; Arnaldo S. R. Oliveira; Konstantin Kondratjuk (FPL, 1998)

Design and implementation of control circuits based on dynamically reconfigurable FPGA. - Valery Sklyarov; António de Brito Ferrari (ICECS, 1998)

Logic Synthesis of Reconfigurable Control Circuits based on Mutually Exclusive Reprogrammable Elements. - Valery Sklyarov (SBCCI, 1998)

Synthesis Tools and Design Environment for Dynamically Reconfigurable FPGAs. - Valery Sklyarov; Nuno Lau; Arnaldo S. R. Oliveira; Andreia Melo; Konstantin Kondratjuk; António de Brito Ferrari; Ricardo Sal Monteiro; Iouliia Skliarova (SBCCI, 1998)

Development System for FPGA-Based Digital Circuits. - Valery Sklyarov; José A. Fonseca; Ricardo Sal Monteiro; Arnaldo S. R. Oliveira; Andreia Melo; Nuno Lau; Iouliia Skliarova; Paulo A. C. S. Neves; António de Brito Ferrari (FCCM, 1999)

FPGA-Targeted Development System for Embedded Applications. - Valery Sklyarov; José A. Fonseca; Ricardo Sal Monteiro; Arnaldo S. R. Oliveira; Andreia Melo; Nuno Lau; Konstantin Kondratjuk; Iouliia Skliarova; Paulo A. C. S. Neves; António de Brito Ferrari (FPGA, 1999)

Specification, Implementation and Testing of HFSMs in Dynamically Reconfigurable FPGAs. - Arnaldo S. R. Oliveira; Andreia Melo; Valery Sklyarov (FPL, 1999)

Implementation of virtual control circuits in dynamically reconfigurable FPGAs. - Arnaldo S. R. Oliveira; Valery Sklyarov (ICECS, 1999)

Dynamically Reconfigurable Implementation of Control Circuits. - Nuno Lau; Valery Sklyarov (VLSI, 1999)

Graphical Description and Hardware Implementation of Parallel Control Algorithms. - Valery Sklyarov (PDPTA, 1999)

Hierarchical finite-state machines and their use for digital control. - Valery Sklyarov (IEEE Trans. Very Large Scale Integr. Syst., 1999)

Synthesis and Implementation of RAM-Based Finite State Machines in FPGAs. - Valery Sklyarov (FPL, 2000)

The Specification and Design of Parallel Logical Control Devices. - Arkadij Zakrevskij; Valery Sklyarov (PDPTA, 2000)

Synthesis of Control Circuits with Dynamically Modifiable Behavior on the Basis of Statically Reconfigurable FPGAs. - Valery Sklyarov (SBCCI, 2000)

An Evolutionary Algorithm for the Synthesis of RAM-Based FSMs. - Valery Sklyarov (IEA/AIE, 2002)

Reconfigurable models of finite state machines and their implementation in FPGAs. - Valery Sklyarov (J. Syst. Archit., 2002)

Hardware/software modeling of FPGA-based systems. - Valery Sklyarov (Parallel Algorithms Appl., 2002)

Design of Digital Circuits on the Basis of Hardware Templates. - Valery Sklyarov; Iouliia Skliarova (Embedded Systems and Applications, 2003)

Design Tools and Reusable Libraries for FPGA-Based Digital Circuits. - Valery Sklyarov; Iouliia Skliarova; Pedro Almeida; Manuel Almeida (DSD, 2003)

A Dynamically Reconfigurable Accelerator for Operations over Boolean and Ternary Vectors. - Valery Sklyarov; Iouliia Skliarova; Arnaldo S. R. Oliveira; António de Brito Ferrari (DSD, 2003)

Architecture of a Reconfigurable Processor for Implementing Search Algorithm over Discrete Matrices. - Valery Sklyarov; Iouliia Skliarova (Engineering of Reconfigurable Systems and Algorithms, 2003)

Reconfigurable Systems in Education. - Valery Sklyarov; Iouliia Skliarova (FPL, 2003)

High-Level Design Tools for FPGA-Based Combinatorial Accelerators. - Valery Sklyarov; Iouliia Skliarova; Pedro Almeida; Manuel Almeida (FPL, 2003)

Hardware/Software Implementation of FPGA-Targeted Matrix-Oriented SAT Solvers. - Valery Sklyarov; Iouliia Skliarova; Bruno Figueiredo Pimentel; Joel Arrais (FPL, 2004)

FPGA-based implementation of recursive algorithms. - Valery Sklyarov (Microprocess. Microsystems, 2004)

ARPA - A Technology Independent and Synthetizable System-on-Chip Model for Real-Time Applications. - Arnaldo S. R. Oliveira; Valery Sklyarov; António de Brito Ferrari (DSD, 2005)

FPGA-based implementation and comparison of recursive and iterative algorithms. - Valery Sklyarov; Iouliia Skliarova; Bruno Figueiredo Pimentel (FPL, 2005)

Teaching reconfigurable systems: methods, tools, tutorials, and projects. - Valery Sklyarov; Iouliia Skliarova (IEEE Trans. Educ., 2005)

Evolutionary Algorithm for State Encoding. - Valery Sklyarov; Iouliia Skliarova (IFIP AI, 2006)

Recursive and Iterative Algorithms for N-ary Search Problems. - Valery Sklyarov; Iouliia Skliarova (IFIP PPAI, 2006)

E-learning Tools and Web-resources for Teaching Reconfigurable Systems. - Valery Sklyarov; Iouliia Skliarova (Education for the 21st Century, 2006)

Reconfigurable Systems and their Influence on Mobile and Multimedia Applications. - Valery Sklyarov; Iouliia Skliarova (MoMM, 2006)

Multimedia Tools for Teaching Reconfigurable Systems. - Valery Sklyarov; Iouliia Skliarova (MoMM, 2006)

Software/Configware Implementation of Combinatorial Algorithms. - Iouliia Skliarova; Valery Sklyarov (AICCSA, 2007)

Encoding Algorithms for Logic Synthesis. - Valery Sklyarov; Iouliia Skliarova (AICCSA, 2007)

Reuse Technique in Hardware Design. - Valery Sklyarov; Iouliia Skliarova (IRI, 2007)

A prototyping system for mobile devices. - Valery Sklyarov; Iouliia Skliarova; Manuel Almeida; Bruno Figueiredo Pimentel (IWCMC, 2007)

Recursive versus Iterative Algorithms for Solving Combinatorial Search Problems in Hardware. - Iouliia Skliarova; Valery Sklyarov (VLSI Design, 2008)

Multimedia Tools and Architectures for Hardware/Software Co-Simulation of Reconfigurable Systems. - Valery Sklyarov; Iouliia Skliarova; Bruno Figueiredo Pimentel; Manuel Almeida (VLSI Design, 2008)

Recursion in reconfigurable computing: A survey of implementation approaches. - Iouliia Skliarova; Valery Sklyarov (FPL, 2009)

Application-specific hardware accelerator for implementing recursive sorting algorithms. - Dmitri Mihhailov; Valery Sklyarov; Iouliia Skliarova; Alexander Sudnitson (FPT, 2010)

Parallel FPGA-Based Implementation of Recursive Sorting Algorithms. - Dmitri Mihhailov; Valery Sklyarov; Iouliia Skliarova; Alexander Sudnitson (ReConFig, 2010)

Synthesis and Implementation of Hierarchical Finite State Machines with Implicit Modules. - Valery Sklyarov; Iouliia Skliarova; Dmitri Mihhailov; Alexander Sudnitson (ReConFig, 2010)

Recursion and hierarchy in digital design and prototyping: a case study. - Dmitri Mihhailov; Margus Kruus; Valery Sklyarov; Iouliia Skliarova; Alexander Sudnitson (CompSysTech, 2011)

High-performance hardware accelerators for sorting and managing priorities. - Valery Sklyarov; Iouliia Skliarova; Dmitri Mihhailov; Alexander Sudnitson (DDECS, 2011)

Implementation in FPGA of Address-Based Data Sorting. - Valery Sklyarov; Iouliia Skliarova; Dmitri Mihhailov; Alexander Sudnitson (FPL, 2011)

Methodology and international collaboration in teaching reconfigurable systems. - Valery Sklyarov; Iouliia Skliarova; Alexander Sudnitson (EDUCON, 2012)

Performance evaluation for FPGA-based processing of tree-like structures. - Valery Sklyarov; Iouliia Skliarova; Dmitri Mihhailov; Alexander Sudnitson (ICECS, 2012)

Optimization of address-based data sorting unit with external memory support. - Dmitri Mihhailov; Artjem Rjabov; Valery Sklyarov; Iouliia Skliarova; Alexander Sudnitson (CompSysTech, 2013)

Address-based data processing over N-ary trees. - Valery Sklyarov; Iouliia Skliarova; Margus Kruus; Dmitri Mihhailov; Alexander Sudnitson (EUROCON, 2013)

Implementation of address-based data sorting on different FPGA platforms. - Dmitri Mihhailov; Alexander Sudnitson; Valery Sklyarov; Iouliia Skliarova (EWDTS, 2013)

Implementation of parallel operations over streams in extensible processing platforms. - Valery Sklyarov; Iouliia Skliarova; Artjem Rjabov; Alexander Sudnitson (MWSCAS, 2013)

Hardware implementations of software programs based on hierarchical finite state machine models. - Valery Sklyarov; Iouliia Skliarova (Comput. Electr. Eng., 2013)

Design space exploration in multi-level computing systems. - Valery Sklyarov; Iouliia Skliarova; João Paulo Sá da Silva; Alexander Sudnitson (CompSysTech, 2014)

Teaching FPGA-based systems. - Iouliia Skliarova; Valery Sklyarov; Alexander Sudnitson; Margus Kruus (EDUCON, 2014)

High-performance implementation of regular and easily scalable sorting networks on an FPGA. - Valery Sklyarov; Iouliia Skliarova (Microprocess. Microsystems, 2014)

FPGA-based Accelerators for Parallel Data Sort. - Valery Sklyarov; Iouliia Skliarova; Alexander Sudnitson (Appl. Comput. Syst., 2014)

Analysis and Comparison of Attainable Hardware Acceleration in All Programmable Systems-on-Chip. - Valery Sklyarov; Iouliia Skliarova; João Paulo Sá da Silva; Alexander Sudnitson (DSD, 2015)

FPGA-based time and cost effective Hamming weight comparators for binary vectors. - Valery Sklyarov; Iouliia Skliarova; Alexander Sudnitson; Margus Kruus (EUROCON, 2015)

Integration of high-level synthesis to the courses on reconfigurable digital systems. - Iouliia Skliarova; Valery Sklyarov; Alexander Sudnitson; Margus Kruus (MIPRO, 2015)

Design and implementation of counting networks. - Valery Sklyarov; Iouliia Skliarova (Computing, 2015)

Comparison of On-chip Communications in Zynq-7000 All Programmable Systems-on-Chip. - João Paulo Sá da Silva; Valery Sklyarov; Iouliia Skliarova (IEEE Embed. Syst. Lett., 2015)

Multi-core DSP-based Vector Set Bits Counters/Comparators. - Valery Sklyarov; Iouliia Skliarova (J. Signal Process. Syst., 2015)

Computing Sorted Subsets for Data Processing in Communicating Software/Hardware Control Systems. - Valery Sklyarov; Iouliia Skliarova; Artjem Rjabov; Alexander Sudnitson (Int. J. Comput. Commun. Control, 2016)

On-Chip Reconfigurable Hardware Accelerators for Popcount Computations. - Valery Sklyarov; Iouliia Skliarova; João Paulo Sá da Silva (Int. J. Reconfigurable Comput., 2016)

Reconfigurable systems in engineering education: Best practices and future trends. - Iouliia Skliarova; Valery Sklyarov; Alexander Sudnitson; Margus Kruus (EDUCON, 2017)

RAM-based mergers for data sort and frequent item computation. - Artjem Rjabov; Valery Sklyarov; Iouliia Skliarova; Alexander Sudnitson (MIPRO, 2017)

Data processing in the firmware systems for logic control based on search networks. - Valery Sklyarov; Iouliia Skliarova (Autom. Remote. Control., 2017)

FPGA-BASED Hardware Accelerators - Iouliia Skliarova; Valery Sklyarov (Springer, 2019)