An interleaved delta-sigma analog to digital converter with digital correction. - Van Tam Nguyen 001; Patrick Loumeau; Jean-François Naviner (ICASSP, 2002)

A time-interleaved chopper-stabilized delta-sigma analog to digital converter. - Van Tam Nguyen 001; Patrick Loumeau; Jean-François Naviner (ICECS, 2002)

Analysis of time-interleaved delta-sigma analog to digital converter. - Van Tam Nguyen 001; Patrick Loumeau; Jean-François Naviner (VTC Spring, 2002)

Temporel and spectral analysis of time interleaved high pass sigma delta converter. - Van-Tam Nguyen 001; Patrick Loumeau; Jean-François Naviner (ICASSP (2), 2003)

High-pass Delta Sigma modulator: from system analysis to circuit design. - Van Tam Nguyen 001; Patrick Loumeau; Jean-François Naviner (ISCAS, 2006)

A CMOS implementation of time-interleaved high-pass Delta Sigma modulator. - Van Tam Nguyen 001; Patrick Loumeau; Jean-François Naviner (ISCAS, 2006)

A 65 nm CMOS Digital Processor for Multi-mode Time Interleaved High-pass SigmaDelta A/D Converters. - Ali Beydoun; Van Tam Nguyen 001; Lirida A. B. Naviner; Patrick Loumeau (ISCAS, 2009)

A 1 V 65 nm CMOS Reconfigurable Time Interleaved High Pass SigmaDelta ADC. - Chadi Jabbour; David Camarero; Van Tam Nguyen 001; Patrick Loumeau (ISCAS, 2009)

A novel digital calibration technique for gain and offset mismatch in parallel TISigmaDelta ADCs. - Ali Beydoun; Van-Tam Nguyen 001; Patrick Loumeau (ICASSP, 2010)

A new interpolation technique for TI ΣΔ A/D converters. - Chadi Jabbour; Ali Beydoun; Van Tam Nguyen 001; Patrick Loumeau (ISCAS, 2010)

A technique to reduce the impact of hysterisys in ΣΔ analog to digital converters. - Chadi Jabbour; Van Tam Nguyen 001; Patrick Loumeau (ISCAS, 2010)

Optimization of bandpass charge sampling filters in hybrid filter banks converters for cognitive radio applications. - Alban Gruget; Morgan Roger; Van Tam Nguyen 001; Caroline Lelandais-Perrault; Philippe Bénabès; Patrick Loumeau (ECCTD, 2011)

A novel design methodology for multiplierless filters applied on ΔΣ decimators. - Chadi Jabbour; Hussein Fakhoury; Van Tam Nguyen 001; Patrick Loumeau (ICECS, 2011)

High-pass or low-pass ΣΔ modulators? - Chadi Jabbour; Hasham Ahmed Khushk; Van Tam Nguyen 001; Patrick Loumeau (ICECS, 2011)

High pass filter implementation comparison in unity STF high pass ΔΣ modulator. - Van Tam Nguyen 001; Hasham Ahmed Khushk; Chadi Jabbour; Patrick Loumeau (ICECS, 2011)

A low-power ΣΔ ADC optimized for GSM/EDGE standard in 65-nm CMOS. - Hussein Fakhoury; Chadi Jabbour; Hasham Khushk; Van-Tam Nguyen 001; Patrick Loumeau (ISCAS, 2011)

A LP/HP UMTS/GSM ΣΔ ADC suited for a Zero-IF/Low-IF receiver. - Chadi Jabbour; Hasham Khushk; Hussein Fakhoury; Van Tam Nguyen 001; Patrick Loumeau (ISCAS, 2011)

Generalized multi-stage closed loop sigma delta modulator. - Van Tam Nguyen 001; Hussein Fakhoury; Patrick Loumeau; Philippe Bénabès (ISCAS, 2011)

A Comparative Study of Loop Filter Alternatives in Second-Order High-Pass ΔΣ Modulators. - Hasham Ahmed Khushk; Patrick Loumeau; Van Tam Nguyen 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

A low power RC time constant auto-tuning circuit for RC-integrators in high linearity continuous-time delta sigma modulators. - Cyrius Ouffoue; Van-Tam Nguyen 001; Chadi Jabbour; Hussein Fakhoury; Patrick Loumeau (NEWCAS, 2012)

Direct delta-sigma receiver: Analysis, modelization and simulation. - Minh-Tien Nguyen; Chadi Jabbour; Cyrius Ouffoue; Rayan Mina; Florent Sibille; Patrick Loumeau; Pascal Triaire; Van Tam Nguyen 001 (ISCAS, 2013)

A novel dynamic element matching technique suited for high pass ΔΣ ADCs. - Chadi Jabbour; Hussein Fakhoury; Van Tam Nguyen 001; Patrick Loumeau (NEWCAS, 2013)

Delay-Reduction Technique for DWA Algorithms. - Chadi Jabbour; Hussein Fakhoury; Van Tam Nguyen 001; Patrick Loumeau (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

A 40 MHz 11-Bit ENOB Delta Sigma ADC for Communication and Acquisition Systems. - Hussein Fakhoury; Chadi Jabbour; Van-Tam Nguyen 001 (Sensors, 2023)