IndexMAC: A Custom RISC-V Vector Instruction to Accelerate Structured-Sparse Matrix Multiplications. - Vasileios Titopoulos; Kosmas Alexandridis; Christodoulos Peltekis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (DATE, 2024)

A High-Level Synthesis Library for Synthesizing Efficient and Functional-Safe CNN Dataflow Accelerators. - Dionysios Filippas; Christodoulos Peltekis; Vasileios Titopoulos; Ioannis Kansizoglou; Georgios Ch. Sirakoulis; Antonios Gasteratos; Giorgos Dimitrakopoulos (IEEE Access, 2024)

DeMM: A Decoupled Matrix Multiplication Engine Supporting Relaxed Structured Sparsity. - Christodoulos Peltekis; Vasileios Titopoulos; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (IEEE Comput. Archit. Lett., 2024)

Register Dispersion: Reducing the Footprint of the Vector Register File in Vector Engines of Low-Cost RISC-V CPUs. - Vasileios Titopoulos; George Alexakis; Kosmas Alexandridis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (CF, 2025)

Low-Cost FlashAttention with Fused Exponential and Multiplication Hardware Operators. - Kosmas Alexandridis; Vasileios Titopoulos; Giorgos Dimitrakopoulos (ISVLSI, 2025)

Efficient Implementation of RISC-V Vector Permutation Instructions. - Vasileios Titopoulos; George Alexakis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (ISVLSI, 2025)

Optimizing Structured-Sparse Matrix Multiplication in RISC-V Vector Processors. - Vasileios Titopoulos; Kosmas Alexandridis; Christodoulos Peltekis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (IEEE Trans. Computers, 2025)

FLASH-D: FlashAttention with Hidden Softmax Division. - Kosmas Alexandridis; Vasileios Titopoulos; Giorgos Dimitrakopoulos (CoRR, 2025)

Custom Algorithm-based Fault Tolerance for Attention Layers in Transformers. - Vasileios Titopoulos; Kosmas Alexandridis; Giorgos Dimitrakopoulos (CoRR, 2025)