Designing low-power energy recovery adders based on pass transistor logic. - Dimitrios Soudris; Vasilis F. Pavlidis; Adonios Thanailakis (ICECS, 2001)

A methodology for implementing FIR filters and CAD tool development for designing RNS-based systems. - Dimitrios Soudris; K. Sgouropoulos; Konstantinos Tatas; Vasilis F. Pavlidis; Adonios Thanailakis (ISCAS (5), 2003)

Interconnect delay minimization through interlayer via placement in 3-D ICs. - Vasilis F. Pavlidis; Eby G. Friedman (ACM Great Lakes Symposium on VLSI, 2005)

Via placement for minimum interconnect delay in three-dimensional (3D) circuits. - Vasilis F. Pavlidis; Eby G. Friedman (ISCAS, 2006)

Exploring Alternative 3D FPGA Architectures: Design Methodology and CAD Tool Support. - Kostas Siozios; Kostas Sotiriadis; Vasilis F. Pavlidis; Dimitrios Soudris (FPL, 2007)

A software-supported methodology for designing high-performance 3D FPGA architectures. - Kostas Siozios; Kostas Sotiriadis; Vasilis F. Pavlidis; Dimitrios Soudris (VLSI-SoC, 2007)

3-D Topologies for Networks-on-Chip. - Vasilis F. Pavlidis; Eby G. Friedman (IEEE Trans. Very Large Scale Integr. Syst., 2007)

Clock distribution networks for 3-D ictegrated Circuits. - Vasilis F. Pavlidis; Ioannis Savidis; Eby G. Friedman (CICC, 2008)

Physical Design Issues in 3-D Integrated Technologies. - Vasilis F. Pavlidis; Eby G. Friedman (VLSI-SoC (Selected Papers), 2008)

Timing-driven via placement heuristics for three-dimensional ICs. - Vasilis F. Pavlidis; Eby G. Friedman (Integr., 2008)

A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs. - Kostas Siozios; Vasilis F. Pavlidis; Dimitrios Soudris (DATE, 2009)

Power distribution paths in 3-D ICS. - Vasilis F. Pavlidis; Giovanni De Micheli (ACM Great Lakes Symposium on VLSI, 2009)

Repeater Insertion for Two-Terminal Nets in Three-Dimensional Integrated Circuits. - Hu Xu 002; Vasilis F. Pavlidis; Giovanni De Micheli (NanoNet, 2009)

Interconnect-Based Design Methodologies for Three-Dimensional Integrated Circuits. - Vasilis F. Pavlidis; Eby G. Friedman (Proc. IEEE, 2009)

Performance analysis of 3-D monolithic integrated circuits. - Shashikanth Bobba; Ashutosh Chakraborty; Olivier Thomas; Perrine Batude; Vasilis F. Pavlidis; Giovanni De Micheli (3DIC, 2010)

Synchronization and power integrity issues in 3-D ICs. - Vasilis F. Pavlidis; Hu Xu 002; Ioannis Tsioutsios; Giovanni De Micheli (APCCAS, 2010)

Physical design tradeoffs in power distribution networks for 3-D ICs. - Ioannis Tsioutsios; Vasilis F. Pavlidis; Giovanni De Micheli (ICECS, 2010)

Process-induced skew variation for scaled 2-D and 3-D ICs. - Hu Xu 002; Vasilis F. Pavlidis; Giovanni De Micheli (SLIP, 2010)

Analytical heat transfer model for thermal through-silicon vias. - Hu Xu 002; Vasilis F. Pavlidis; Giovanni De Micheli (DATE, 2011)

Clock distribution models of 3-D integrated systems. - Ioannis Savidis; Vasilis F. Pavlidis; Eby G. Friedman (ISCAS, 2011)

Skew variability in 3-D ICs with multiple clock domains. - Hu Xu 002; Vasilis F. Pavlidis; Giovanni De Micheli (ISCAS, 2011)

Design of Resonant Clock Distribution Networks for 3-D Integrated Circuits. - Somayyeh Rahimian; Vasilis F. Pavlidis; Giovanni De Micheli (PATMOS, 2011)

Clock Distribution Networks in 3-D Integrated Systems. - Vasilis F. Pavlidis; Ioannis Savidis; Eby G. Friedman (IEEE Trans. Very Large Scale Integr. Syst., 2011)

Physical Analysis of NoC Topologies for 3-D Integrated Systems. - Vasilis F. Pavlidis; Eby G. Friedman (3D Integration for NoC-based SoC Architectures, 2011)

Voltage propagation method for 3-D power grid analysis. - Cheng Zhang; Vasilis F. Pavlidis; Giovanni De Micheli (DATE, 2012)

Enhanced wafer matching heuristics for 3-D ICs. - Vasilis F. Pavlidis; Hu Xu 002; Giovanni De Micheli (ETS, 2012)

The combined effect of process variations and power supply noise on clock skew and jitter. - Hu Xu 002; Vasilis F. Pavlidis; Wayne P. Burleson; Giovanni De Micheli (ISQED, 2012)

Effect of process variations in 3D global clock distribution networks. - Hu Xu 002; Vasilis F. Pavlidis; Giovanni De Micheli (ACM J. Emerg. Technol. Comput. Syst., 2012)

Inter-Plane Communication Methods for 3-D ICs. - Somayyeh Rahimian; Vasilis F. Pavlidis; Giovanni De Micheli (J. Low Power Electron., 2012)

A novel framework for exploring 3-D FPGAs with heterogeneous interconnect fabric. - Kostas Siozios; Vasilis F. Pavlidis; Dimitrios Soudris (ACM Trans. Reconfigurable Technol. Syst., 2012)

3.5-D integration: A case study. - Shashikanth Bobba; Pierre-Emmanuel Gaillardon; Ciprian Seiculescu; Vasilis F. Pavlidis; Giovanni De Micheli (ISCAS, 2013)

An Enhanced Design Methodology for Resonant Clock Trees. - Somayyeh Rahimian; Vasilis F. Pavlidis; Xifan Tang; Giovanni De Micheli (J. Low Power Electron., 2013)

Timing Uncertainty in 3-D Clock Trees Due to Process Variations and Power Supply Noise. - Hu Xu 002; Vasilis F. Pavlidis; Xifan Tang; Wayne P. Burleson; Giovanni De Micheli (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Efficient teaching of digital design with automated assessment and feedback. - Paul W. Nutter; Vasilis F. Pavlidis; Jeffrey Pepper (EWME, 2014)

Interconnect design tradeoffs for silicon and glass interposers. - Harry Kalargaris; Vasilis F. Pavlidis (NEWCAS, 2014)

Bandwidth-to-area comparison of through silicon vias and inductive links for 3-D ICs. - Ioannis A. Papistas; Vasilis F. Pavlidis (ECCTD, 2015)

Inter-Tier Crosstalk Noise On Power Delivery Networks For 3-D ICs With Inductively-Coupled Interconnects. - Ioannis A. Papistas; Vasilis F. Pavlidis (ACM Great Lakes Symposium on VLSI, 2016)

IC thermal analyzer for versatile 3-D structures using multigrid preconditioned krylov methods. - Scott Ladenheim; Yi-Chung Chen; Milan Mihajlovic; Vasilis F. Pavlidis (ICCAD, 2016)

Crosstalk noise effects of on-chip inductive links on power delivery networks. - Ioannis A. Papistas; Vasilis F. Pavlidis (ISCAS, 2016)

Application performance improvement by exploiting process variability on FPGA devices. - Konstantinos Maragos 001; George Lentaris; Dimitrios Soudris; Kostas Siozios; Vasilis F. Pavlidis (DATE, 2017)

Computationally efficient standard-cell FEM-based thermal analysis. - Yi-Chung Chen; Scott Ladenheim; Harry Kalargaris; Milan Mihajlovic; Vasilis F. Pavlidis (ICCAD, 2017)

Contactless inter-tier communication for heterogeneous 3-D ICs. - Ioannis A. Papistas; Vasilis F. Pavlidis (ISCAS, 2017)

STA compatible backend design flow for TSV-based 3-D ICs. - Harry Kalargaris; Yi-Chung Chen; Vasilis F. Pavlidis (ISQED, 2017)

Voltage scaling for 3-D ICs: When, how, and how much? - Harry Kalargaris; Vasilis F. Pavlidis (Microelectron. J., 2017)

Mismatch Compensation Technique for Inverter-Based CMOS Circuits. - Przemyslaw Mroszczyk; Vasilis F. Pavlidis (ISCAS, 2018)

Ultra-low swing CMOS transceiver for 2.5-D integrated systems. - Przemyslaw Mroszczyk; Vasilis F. Pavlidis (ISQED, 2018)

Energy Efficiency of Low Swing Signaling for Emerging Interposer Technologies. - Eleni Maragkoudaki; Przemyslaw Mroszczyk; Vasilis F. Pavlidis (NANOARCH, 2018)

Contactless Heterogeneous 3-D ICs for Smart Sensing Systems. - Ioannis A. Papistas; Vasilis F. Pavlidis (Integr., 2018)

The MTA: An Advanced and Versatile Thermal Simulator for Integrated Systems. - Scott Ladenheim; Yi-Chung Chen; Milan Mihajlovic; Vasilis F. Pavlidis (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Efficient Modeling of Crosstalk Noise on Power Distribution Networks for Contactless 3-D ICs. - Ioannis A. Papistas; Vasilis F. Pavlidis (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Adaptive Word Reordering for Low-Power Inter-Chip Communication. - Eleni Maragkoudaki; Przemyslaw Mroszczyk; Vasilis F. Pavlidis (DATE, 2019)

Adaptive Transient Leakage-Aware Linearised Model for Thermal Analysis of 3-D ICs. - Chao Zhang; Milan Mihajlovic; Vasilis F. Pavlidis (DATE, 2019)

PVT-Aware Sensing and Voltage Scaling for Energy Efficient FPGAs. - Konstantinos Maragos 001; George Lentaris; Dimitrios Soudris; Vasilis F. Pavlidis (FPGA, 2019)

An Overview of Thermal Challenges and Opportunities for Monolithic 3D ICs. - Prachi Shukla; Ayse K. Coskun; Vasilis F. Pavlidis; Emre Salman (ACM Great Lakes Symposium on VLSI, 2019)

Efficient Linear System Solution Techniques in the Simulation of Large Dense Mutually Inductive Circuits. - Charalampos Antoniadis; Milan Mihajlovic; Nestor E. Evmorfopoulos; Georgios I. Stamoulis; Vasilis F. Pavlidis (ICCD, 2019)

Energy Efficient Flash ADC With PVT Variability Compensation Through Advanced Body Biasing. - Przemyslaw Mroszczyk; John Goodacre; Vasilis F. Pavlidis (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

Fabrication Cost Analysis for Contactless 3-D ICs. - Ioannis A. Papistas; Vasilis F. Pavlidis; Dimitrios Velenis (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. - Massimo Alioto; Magdy S. Abadir; Tughrul Arslan; Chirn Chye Boon; Andreas Burg 001; Chip-Hong Chang; Meng-Fan Chang; Yao-Wen Chang; Poki Chen; Pasquale Corsonello; Paolo Crovetti; Shiro Dosho; et al. (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Cost Modeling and Analysis of TSV and Contactless 3D-ICs. - Minmin Jiang; Ioannis A. Papistas; Vasilis F. Pavlidis (ACM Great Lakes Symposium on VLSI, 2020)

Zero-skew Clock Network Synthesis for Monolithic 3D ICs with Minimum Wirelength. - Wei Wang; Vasilis F. Pavlidis; Yuanqing Cheng (ACM Great Lakes Symposium on VLSI, 2020)

Metal Stack and Partitioning Exploration for Monolithic 3D ICs. - Nikolaos Sketopoulos; Christos P. Sotiriou; Vasilis F. Pavlidis (ISVLSI, 2020)

Energy-Efficient Time-Based Adaptive Encoding for Off-Chip Communication. - Eleni Maragkoudaki; Vasilis F. Pavlidis (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Temperature-Aware Optimization of Monolithic 3D Deep Neural Network Accelerators. - Prachi Shukla; Sean S. Nemtzow; Vasilis F. Pavlidis; Emre Salman; Ayse K. Coskun (ASP-DAC, 2021)

A PWM-free DC-DC Boost Converter with 0.43 V Input for Extended Battery Use in IoT Applications. - Andreas Tsiougkos; Vasilis F. Pavlidis (MWSCAS, 2021)

Performance-Aware Interconnect Delay Insertion Against EM Side-Channel Attacks. - Minmin Jiang; Vasilis F. Pavlidis (SLIP, 2021)

TSV-based hairpin bandpass filter for 6G mobile communication applications. - Fengjuan Wang; Lei Ke; Xiangkun Yin; Vasilis F. Pavlidis; Ningmei Yu; Yuan Yang 006 (IEICE Electron. Express, 2021)

Design of compact LC lowpass filters based on coaxial through-silicon vias array. - Xiangkun Yin; Fengjuan Wang; Vasilis F. Pavlidis; Xiaoxian Liu; Qijun Lu; Tao Zhang 086; Yang Liu 106 (Microelectron. J., 2021)

Monolithic 3D Integrated Circuits: Recent Trends and Future Prospects. - Krithika Dhananjay; Prachi Shukla; Vasilis F. Pavlidis; Ayse K. Coskun; Emre Salman (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Mitigating EM Side-Channel Attacks with Dynamic Delay Insertion and Data Bus Inversion. - Minmin Jiang; Eleni Maragkoudaki; Vasilis F. Pavlidis (ISCAS, 2022)

Thermal Modeling and Design Exploration for Monolithic 3D ICs. - Baoli Peng; Vasilis F. Pavlidis; Yi-Chung Chen; Yuanqing Cheng (ISQED, 2022)

Practical Day-Ahead Power Prediction of Solar Energy-Harvesting for IoT Systems. - Konstantinos Falis; Andreas Tsiougkos; Vasilis F. Pavlidis (VLSI-SoC, 2022)

Temperature-Aware Monolithic 3D DNN Accelerators for Biomedical Applications. - Prachi Shukla; Vasilis F. Pavlidis; Emre Salman; Ayse K. Coskun (CoRR, 2022)

Emerging monolithic 3D integration: Opportunities and challenges from the computer system perspective. - Yuanqing Cheng; Xiaochen Guo; Vasilis F. Pavlidis (Integr., 2022)

High Bandwidth Thermal Covert Channel in 3-D-Integrated Multicore Processors. - Krithika Dhananjay; Vasilis F. Pavlidis; Ayse K. Coskun; Emre Salman (IEEE Trans. Very Large Scale Integr. Syst., 2022)

Energy-Efficient Encoding for High-Speed Serial Interfaces. - Eleni Maragkoudaki; William B. Toms; Vasilis F. Pavlidis (IEEE Trans. Very Large Scale Integr. Syst., 2022)

A Novel Design Methodology for Modular, Digitally Controlled, Multiband, mmWave LNAs. - Georgios Chararas; Athanasios Stefanou; Alkiviadis Hatzopoulos; Vasilis F. Pavlidis (MOCAST, 2023)

Mismatch Driven Systematic Design Methodology for Transistor Based Active Resistors. - Andreas Tsiougkos; Alkis A. Hatzopoulos; Vasilis F. Pavlidis (MWSCAS, 2023)

TREAD-M3D: Temperature-Aware DNN Accelerators for Monolithic 3-D Mobile Systems. - Prachi Shukla; Vasilis F. Pavlidis; Emre Salman; Ayse K. Coskun (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Energy-Efficient Dataflow Design for Monolithic 3D Systolic Arrays with Resistive RAM. - Prachi Shukla; Mohammadamin Hajikhodaverdian; Vasilis F. Pavlidis; Emre Salman; Ayse K. Coskun (IGSC, 2024)

OCTS: An Optical Clock Tree Synthesis Methodology for 2.5D Systems. - Aristotelis Tsekouras; Georgios Kyriazidis; Gage Hills; Vasilis F. Pavlidis (ICCAD, 2024)

ARO: Autoregressive Operator Learning for Transferable and Multi-fidelity 3D-IC Thermal Analysis With Active Learning. - Mingyue Wang; Yuanqing Cheng; Weiheng Zeng; Zhenjie Lu; Vasilis F. Pavlidis; Wei Xing (ICCAD, 2024)

Enhanced Detection of Thermal Covert Channel Attacks in Multicore Processors. - Krithika Dhananjay; Vasilis F. Pavlidis; Ayse K. Coskun; Emre Salman (ISQED, 2024)

CMOS Charge Pump Design for Minimal Silicon Footprint. - Vasiliki Gogolou; Thomas Noulis; Vasilis F. Pavlidis (MOCAST, 2024)

Ternary Clock Tree Synthesis for 3D ICs. - Christos Pavlidis; Nikos Sketopoulos; Christos P. Sotiriou; Vasilis F. Pavlidis (SMACD, 2024)

Two Stage Diode-String Architecture for Ultra-Low Power Digital to Analog Converters. - Andreas Tsiougkos; Moschos Antoniadis; Vasilis F. Pavlidis (SMACD, 2024)

A New Dataflow Implementation to Improve Energy Efficiency of Monolithic 3D Systolic Arrays. - Prachi Shukla; Vasilis F. Pavlidis; Emre Salman; Ayse K. Coskun (CoRR, 2024)

MORCIC: Model Order Reduction Techniques for Electromagnetic Models of Integrated Circuits. - Dimitrios Garyfallou; Athanasios Stefanou; Christos Giamouzis; Moschos Antoniadis; Georgios Chararas; Konstantinos Chatzis; Dimitris Samaras; Rafaela Themeli; Anastasios Michailidis; Vasiliki Gogolou; Nikos Zachos; Nestor E. Evmorfopoulos; et al. (CoRR, 2024)

A Comprehensive Inductance-Aware Modeling Approach to Power Distribution Network in Heterogeneous 3D Integrated Circuits. - Quansen Wang; Vasilis F. Pavlidis; Yuanqing Cheng (DATE, 2025)

Impact of Prolonged Thermal Stress on Intel i7-6600U Graphics Performance. - Panagiotis Karydopoulos; Vasilis F. Pavlidis (ICCE, 2025)

Parametric RISC-V Compliant Floating-Point Arithmetic and Conversion Circuits. - Spyros Chalkias; Anastasis Avgoustidis; Thomas Noulis; Georgios Keramidas; Vasilis F. Pavlidis (ISVLSI, 2025)

Enhancing Performance of Floating Point Units Using Parallel Prefix Adders. - Andreas-Efstathios Eleftheriadis; Thomas Noulis; Georgios Keramidas; Vasilis F. Pavlidis (ISVLSI, 2025)

Tournament Cache Decay: Tight Control of Leakage Power for Last-Level Caches. - Theodoros Papavasileiou; Georgios Keramidas; Vasilis F. Pavlidis (ISVLSI, 2025)

3DPlace: Timing-driven Detailed Placement for Monolithic 3D ICs. - Dimitrios Vamvakidis; Christos Georgakidis; Aikaterini Tsilingiri; Nikolaos Sketopoulos; Christos P. Sotiriou; Vasilis F. Pavlidis (ISVLSI, 2025)

Inductive Effect-Aware Power Distribution Network Modeling and Analysis for Heterogeneous 3D Integrated Circuits. - Quansen Wang; Vasilis F. Pavlidis; Xuning Feng; Rui Wang; Wei Zhang; Yuanqing Cheng (ISVLSI, 2025)

PV-Clock: Process Variation-Aware 3D Clock Network Synthesis for Robust and Power-Efficient Timing Optimization. - Yiyu Wang; Vasilis F. Pavlidis; Rui Wang; Yuanqing Cheng (ISVLSI, 2025)

Integrating P-Bits in MTJs: A Bridge to Efficient Stochastic Computing. - Nellie Laleni; Sina Ranjbar; Ran Zhang; Andreas Tsiougkos; Nandakishor Yadav; Vasilis F. Pavlidis; Thomas Kämpfe (MOCAST, 2025)

A Design Methodology for Thermal Monitoring of Reusable Passive Interposers With RTDs. - Andreas Tsiougkos; Vasilis F. Pavlidis (IEEE Trans. Very Large Scale Integr. Syst., 2025)