Modular Composition and Verification of Transaction Processing Protocols. - Vasudevan Janarthanan; Purnendu Sinha (ICDCS, 2003)

Universal scheduler design on uniprocessors in supervisory control of discrete-event systems framework. - Vasudevan Janarthanan; Peyman Gohari (CCA, 2005)

Formalizing real-time scheduling using priority-based supervisory control of discrete-event systems. - Vasudevan Janarthanan; Peyman Gohari; Abdollah Saffar (IEEE Trans. Autom. Control., 2006)

Multiprocessor Scheduling in Supervisory Control of discrete-Event Systems Framework. - Vasudevan Janarthanan; Peyman Gohari (Control. Intell. Syst., 2007)

Architectures for Dependable Software Systems. - Vasudevan Janarthanan; Abdelouahed Gherbi (ITNG, 2011)

A model-based framework for the design of a symbolic scheduler for pre-emptive real-time tasks. - Vasudevan Janarthanan; Abdelouahed Gherbi (ISSPA, 2012)

Serious Video Games: Games for Education and Health. - Vasudevan Janarthanan (ITNG, 2012)

Innovations in Art and Production: Sound, Modeling and Animation. - Vasudevan Janarthanan (ITNG, 2012)

Analysis, design, and characterization of wireless power transfer systems using conical coils. - Parinaz Hadadtehrani; Soroosh Dehghani; Reza Molavi; Vasudevan Janarthanan; Thomas Johnson 001; Shahriar Mirabbasi (NEWCAS, 2016)

Predicting Physiological Effects of Chemical Substances Using Natural Language Processing. - Sourav Mukherjee; J. J. Ben-Joseph; Marcelo Campos; Prashan Malla; Hieu Nguyen; Anh Pham; Tim Oates 001; Vasudevan Janarthanan (CCECE, 2021)

Microarchitectural Analysis of Pre-Processing Stage in Machine Learning Workloads. - Muge Zhang; Dae Yeol Lee; Vasudevan Janarthanan; Jeeho Ryoo (ACAI, 2024)