Using Architectural "Families" to Increase FPGA Speed and Density. - Vaughn Betz; Jonathan Rose (FPGA, 1995)

Directional bias and non-uniformity in FPGA global routing architectures. - Vaughn Betz; Jonathan Rose (ICCAD, 1996)

VPR: A new packing, placement and routing tool for FPGA research. - Vaughn Betz; Jonathan Rose (FPL, 1997)

A Fast Routability-Driven Router for FPGAs. - Jordan S. Swartz; Vaughn Betz; Jonathan Rose (FPGA, 1998)

How Much Logic Should Go in an FPGA Logic Block? - Vaughn Betz; Jonathan Rose (IEEE Des. Test Comput., 1998)

Effect of the prefabricated routing track distribution on FPGA area-efficiency. - Vaughn Betz; Jonathan Rose (IEEE Trans. Very Large Scale Integr. Syst., 1998)

Architecture and CAD for Deep-Submicron FPGAS - Vaughn Betz; Jonathan Rose; Alexander Marquardt (Kluwer, 1999)

FPGA Routing Architecture: Segmentation and Buffering to Optimize Speed and Density. - Vaughn Betz; Jonathan Rose (FPGA, 1999)

Using Cluster-Based Logic Blocks and Timing-Driven Packing to Improve FPGA Speed and Density. - Alexander Marquardt; Vaughn Betz; Jonathan Rose (FPGA, 1999)

Automatic generation of FPGA routing architectures from high-level descriptions. - Vaughn Betz; Jonathan Rose (FPGA, 2000)

Timing-driven placement for FPGAs. - Alexander Marquardt; Vaughn Betz; Jonathan Rose (FPGA, 2000)

Speed and area tradeoffs in cluster-based FPGA architectures. - Alexander Marquardt; Vaughn Betz; Jonathan Rose (IEEE Trans. Very Large Scale Integr. Syst., 2000)

The StratixTM routing and logic architecture. - David M. Lewis; Vaughn Betz; David Jefferson; Andy Lee; Christopher Lane; Paul Leventis; Sandy Marquardt; Cameron McClintock; Bruce Pedersen; Giles Powell; Srinivas Reddy; Chris Wysocki; et al. (FPGA, 2003)

Simultaneous short-path and long-path timing optimization for FPGAs. - Ryan Fung; Vaughn Betz; William Chow (ICCAD, 2004)

The Stratix II logic and routing architecture. - David M. Lewis; Elias Ahmed; Gregg Baeckler; Vaughn Betz; Mark Bourgeault; David Cashman; David R. Galloway; Mike Hutton; Christopher Lane; Andy Lee; Paul Leventis; Sandy Marquardt; et al. (FPGA, 2005)

Power-aware RAM mapping for FPGA embedded memory blocks. - Russell Tessier; Vaughn Betz; David Neto; Thiagaraja Gopalsamy (FPGA, 2006)

Power-Efficient RAM Mapping Algorithms for FPGA Embedded Memory Blocks. - Russell Tessier; Vaughn Betz; David Neto; Aaron Egier; Thiagaraja Gopalsamy (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

High-quality, deterministic parallel placement for FPGAs on commodity hardware. - Adrian Ludwin; Vaughn Betz; Ketan Padalia (FPGA, 2008)

Portable and scalable FPGA-based acceleration of a direct linear system solver. - Wei Zhang 222; Vaughn Betz; Jonathan Rose (FPT, 2008)

Slack Allocation and Routing to Improve FPGA Timing While Repairing Short-Path Violations. - Ryan Fung; Vaughn Betz; William Chow (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

FPGA Synthesis and Physical Design. - Mike Hutton; Vaughn Betz (Embedded Systems Design and Verification, 2009)

FPGA challenges and opportunities at 40nm and beyond. - Vaughn Betz (FPL, 2009)

Recent FPGA Advances and Challenges. - Vaughn Betz; Stephen Brown 003 (ERSA, 2010)

A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs. - Doris Chen; Deshanand P. Singh; Jeffrey Chromczak; David M. Lewis; Ryan Fung; David Neto; Vaughn Betz (FPGA, 2010)

Comparing FPGA vs. custom cmos and the impact on processor microarchitecture. - Henry Wong; Vaughn Betz; Jonathan Rose (FPGA, 2011)

FPGAs, Programming Models, and Kit Cars. - Vaughn Betz (IEEE Des. Test Comput., 2011)

Efficient and Deterministic Parallel Placement for FPGAs. - Adrian Ludwin; Vaughn Betz (ACM Trans. Design Autom. Electr. Syst., 2011)

Design tradeoffs for hard and soft FPGA-based Networks-on-Chip. - Mohamed S. Abdelfattah; Vaughn Betz (FPT, 2012)

Are FPGAs suffering from the innovator's dilemna? - Vaughn Betz; Jason Cong (FPGA, 2013)

The power of communication: Energy-efficient NOCS for FPGAS. - Mohamed S. Abdelfattah; Vaughn Betz (FPL, 2013)

Should FPGAS abandon the pass-gate? - Charles Chiasson; Vaughn Betz (FPL, 2013)

Titan: Enabling large and complex benchmarks in academic CAD. - Kevin E. Murray; Scott Whitty; Suya Liu; Jason Luu; Vaughn Betz (FPL, 2013)

From Quartus to VPR: Converting HDL to BLIF with the Titan flow. - Kevin E. Murray; Scott Whitty; Suya Liu; Jason Luu; Vaughn Betz (FPL, 2013)

COFFE: Fully-automated transistor sizing for FPGAs. - Charles Chiasson; Vaughn Betz (FPT, 2013)

Efficient methods for out-of-order load/store execution for high-performance soft processors. - Henry Wong; Vaughn Betz; Jonathan Rose (FPT, 2013)

Efficient and programmable ethernet switching with a NoC-enhanced FPGA. - Andrew Bitar; Jeffrey Cassidy; Natalie D. Enright Jerger; Vaughn Betz (ANCS, 2014)

Speeding Up FPGA Placement: Parallel Algorithms and Methods. - Matthew An; J. Gregory Steffan; Vaughn Betz (FCCM, 2014)

Fast, Power-Efficient Biophotonic Simulations for Cancer Treatment Using FPGAs. - Jeffrey Cassidy; Lothar Lilge; Vaughn Betz (FCCM, 2014)

On Hard Adders and Carry Chains in FPGAs. - Jason Luu; Conor McCullough; Sen Wang; Safeen Huda; Bo Yan; Charles Chiasson; Kenneth B. Kent; Jason Helge Anderson; Jonathan Rose; Vaughn Betz (FCCM, 2014)

Quantifying the cost and benefit of latency insensitive communication on FPGAs. - Kevin E. Murray; Vaughn Betz (FPGA, 2014)

Cad and routing architecture for interposer-based multi-FPGA systems. - André Hahn Pereira; Vaughn Betz (FPGA, 2014)

Comparing performance, productivity and scalability of the TILT overlay processor to OpenCL HLS. - Rafat Rashid; J. Gregory Steffan; Vaughn Betz (FPT, 2014)

The Case for Embedded Networks on Chip on Field-Programmable Gate Arrays. - Mohamed S. Abdelfattah; Vaughn Betz (IEEE Micro, 2014)

Networks-on-Chip for FPGAs: Hard, Soft or Mixed? - Mohamed S. Abdelfattah; Vaughn Betz (ACM Trans. Reconfigurable Technol. Syst., 2014)

VTR 7.0: Next Generation Architecture and CAD System for FPGAs. - Jason Luu; Jeffrey Goeders; Michael Wainberg; Andrew Somerville; Thien Yu; Konstantin Nasartschuk; Miad Nasr; Sen Wang; Tim Liu; Nooruddin Ahmed; Kenneth B. Kent; Jason Helge Anderson; et al. (ACM Trans. Reconfigurable Technol. Syst., 2014)

Quantifying the Gap Between FPGA and Custom CMOS to Aid Microarchitectural Design. - Henry Wong; Vaughn Betz; Jonathan Rose (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Take the Highway: Design for Embedded NoCs on FPGAs. - Mohamed S. Abdelfattah; Andrew Bitar; Vaughn Betz (FPGA, 2015)

Design and simulation tools for Embedded NOCs on FPGAs. - Mohamed S. Abdelfattah; Andrew Bitar; Ange Yaghi; Vaughn Betz (FPL, 2015)

Wotan: A tool for rapid evaluation of FPGA architecture routability without benchmarks. - Oleg Petelin; Vaughn Betz (FPL, 2015)

Bringing programmability to the data plane: Packet processing with a NoC-enhanced FPGA. - Andrew Bitar; Mohamed S. Abdelfattah; Vaughn Betz (FPT, 2015)

HETRIS: Adaptive floorplanning for heterogeneous FPGAs. - Kevin E. Murray; Vaughn Betz (FPT, 2015)

Robust Optimization of Multiple Timing Constraints. - Michael Wainberg; Vaughn Betz (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Timing-Driven Titan: Enabling Large Benchmarks and Exploring the Gap between Academic and Commercial CAD. - Kevin E. Murray; Scott Whitty; Suya Liu; Jason Luu; Vaughn Betz (ACM Trans. Reconfigurable Technol. Syst., 2015)

High Performance Instruction Scheduling Circuits for Out-of-Order Soft Processors. - Henry Wong; Vaughn Betz; Jonathan Rose (FCCM, 2016)

LYNX: CAD for FPGA-based networks-on-chip. - Mohamed S. Abdelfattah; Vaughn Betz (FPL, 2016)

Measure twice and cut once: Robust dynamic voltage scaling for FPGAs. - Ibrahim Ahmed 001; Shuze Zhao; Olivier Trescases; Vaughn Betz (FPL, 2016)

The speed of diversity: Exploring complex FPGA routing topologies for the global metal layer. - Oleg Petelin; Vaughn Betz (FPL, 2016)

High density, low energy, magnetic tunnel junction based block RAMs for memory-rich FPGAs. - Kosuke Tatsumura; Sadegh Yazdanshenas; Vaughn Betz (FPT, 2016)

Microarchitecture and Circuits for a 200 MHz Out-of-Order Soft Processor Memory System. - Henry Wong; Vaughn Betz; Jonathan Rose (ACM Trans. Reconfigurable Technol. Syst., 2016)

Power Analysis of Embedded NoCs on FPGAs and Comparison With Custom Buses. - Mohamed S. Abdelfattah; Vaughn Betz (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Multiple Dice Working as One: CAD Flows and Routing Architectures for Silicon Interposer FPGAs. - Ehsan Nasiri; Javeed Shaikh; André Hahn Pereira; Vaughn Betz (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Quantifying error: Extending static timing analysis with probabilistic transitions. - Kevin E. Murray; Andrea Suardi; Vaughn Betz; George A. Constantinides (DATE, 2017)

Don't Forget the Memory: Automatic Block RAM Modelling, Optimization, and Architecture Exploration. - Sadegh Yazdanshenas; Kosuke Tatsumura; Vaughn Betz (FPGA, 2017)

Find the real speed limit: FPGA CAD for chip-specific application delay measurement. - Ibrahim Ahmed 001; Shuze Zhao; Olivier Trescases; Vaughn Betz (FPL, 2017)

Quantifying and mitigating the costs of FPGA virtualization. - Sadegh Yazdanshenas; Vaughn Betz (FPL, 2017)

Automatic circuit design and modelling for heterogeneous FPGAs. - Sadegh Yazdanshenas; Vaughn Betz (FPT, 2017)

Design and Applications for Embedded Networks-on-Chip on FPGAs. - Mohamed S. Abdelfattah; Andrew Bitar; Vaughn Betz (IEEE Trans. Computers, 2017)

A High-Level Synthesis Case Study on Light Propagation Simulation in Turbid Media. - Abdul-Amir Yassine; Yasmin Afsharnejad; Omar Ragheb; Vaughn Betz; Paul Chow (FCCM, 2018)

Latency Insensitive Design Styles for FPGAs. - Mustafa Abbas; Vaughn Betz (FPL, 2018)

Automatic BRAM Testing for Robust Dynamic Voltage Scaling for FPGAs. - Ibrahim Ahmed 001; Shuze Zhao; James Meijers; Olivier Trescases; Vaughn Betz (FPL, 2018)

Embracing Diversity: Enhanced DSP Blocks for Low-Precision Deep Learning on FPGAs. - Andrew Boutros; Sadegh Yazdanshenas; Vaughn Betz (FPL, 2018)

Tatum: Parallel Timing Analysis for Faster Design Cycles and Improved Optimization. - Kevin E. Murray; Vaughn Betz (FPT, 2018)

Improving Confidentiality in Virtualized FPGAs. - Sadegh Yazdanshenas; Vaughn Betz (FPT, 2018)

HLS-based FPGA Acceleration of Light Propagation Simulation in Turbid Media. - Yasmin Afsharnejad; Abdul-Amir Yassine; Omar Ragheb; Paul Chow; Vaughn Betz (HEART, 2018)

Interconnect Solutions for Virtualized Field-Programmable Gate Arrays. - Sadegh Yazdanshenas; Vaughn Betz (IEEE Access, 2018)

Automatic Application-Specific Calibration to Enable Dynamic Voltage Scaling in FPGAs. - Ibrahim Ahmed 001; Shuze Zhao; Olivier Trescases; Vaughn Betz (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Frequency-Domain Power Delivery Network Self-Characterization in FPGAs for Improved System Reliability. - Shuze Zhao; Ibrahim Ahmed 001; Vaughn Betz; Ashraf Lotfi; Olivier Trescases (IEEE Trans. Ind. Electron., 2018)

You Cannot Improve What You Do not Measure: FPGA vs. ASIC Efficiency Gaps for Convolutional Neural Network Inference. - Andrew Boutros; Sadegh Yazdanshenas; Vaughn Betz (ACM Trans. Reconfigurable Technol. Syst., 2018)

Wotan: Evaluating FPGA Architecture Routability without Benchmarks. - Oleg Petelin; Vaughn Betz (ACM Trans. Reconfigurable Technol. Syst., 2018)

Enhancing FPGAs with Magnetic Tunnel Junction-Based Block RAMs. - Kosuke Tatsumura; Sadegh Yazdanshenas; Vaughn Betz (ACM Trans. Reconfigurable Technol. Syst., 2018)

High-Performance Instruction Scheduling Circuits for Superscalar Out-of-Order Soft Processors. - Henry Wong; Vaughn Betz; Jonathan Rose (ACM Trans. Reconfigurable Technol. Syst., 2018)

Safe Task Interruption for FPGAs. - Sameh Attia; Vaughn Betz (FCCM, 2019)

Fast Voltage Transients on FPGAs: Impact and Mitigation Strategies. - Linda L. Shen; Ibrahim Ahmed 001; Vaughn Betz (FCCM, 2019)

Math Doesn't Have to be Hard: Logic Block Architectures to Enhance Low-Precision Multiply-Accumulate on FPGAs. - Andrew Boutros; Mohamed Eldafrawy; Sadegh Yazdanshenas; Vaughn Betz (FPGA, 2019)

Becoming More Tolerant: Designing FPGAs for Variable Supply Voltage. - Ibrahim Ahmed 001; Linda L. Shen; Vaughn Betz (FPL, 2019)

Calculated Risks: Quantifying Timing Error Probability With Extended Static Timing Analysis. - Kevin E. Murray; Andrea Suardi; Vaughn Betz; George A. Constantinides (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

FRoC 2.0: Automatic BRAM and Logic Testing to Enable Dynamic Voltage Scaling for FPGA Applications. - Ibrahim Ahmed 001; Shuze Zhao; James Meijers; Olivier Trescases; Vaughn Betz (ACM Trans. Reconfigurable Technol. Syst., 2019)

COFFE 2: Automatic Modelling and Optimization of Complex and Heterogeneous FPGA Architectures. - Sadegh Yazdanshenas; Vaughn Betz (ACM Trans. Reconfigurable Technol. Syst., 2019)

The Costs of Confidentiality in Virtualized FPGAs. - Sadegh Yazdanshenas; Vaughn Betz (IEEE Trans. Very Large Scale Integr. Syst., 2019)

AIR: A Fast but Lazy Timing-Driven FPGA Router. - Kevin E. Murray; Sheng Zhong; Vaughn Betz (ASP-DAC, 2020)

StateMover: Combining Simulation and Hardware Execution for Efficient FPGA Debugging. - Sameh Attia; Vaughn Betz (FPGA, 2020)

HPIPE: Heterogeneous Layer-Pipelined and Sparse-Aware CNN Inference for FPGAs. - Mathew Hall; Vaughn Betz (FPGA, 2020)

Using OpenCL to Enable Software-like Development of an FPGA-Accelerated Biophotonic Cancer Treatment Simulator. - Tanner Young-Schultz; Lothar Lilge; Stephen Brown 003; Vaughn Betz (FPGA, 2020)

StateReveal: Enabling Checkpointing of FPGA Designs with Buried State. - Sameh Attia; Vaughn Betz (FPT, 2020)

Neighbors From Hell: Voltage Attacks Against Deep Learning Accelerators on Multi-Tenant FPGAs. - Andrew Boutros; Mathew Hall; Nicolas Papernot; Vaughn Betz (FPT, 2020)

Beyond Peak Performance: Comparing the Real Performance of AI-Optimized FPGAs and GPUs. - Andrew Boutros; Eriko Nurvitadhi; Rui Ma 021; Sergey Gribok; Zhipeng Zhao; James C. Hoe; Vaughn Betz; Martin Langhammer (FPT, 2020)

Learn to Place: FPGA Placement Using Reinforcement Learning and Directed Moves. - Mohamed A. Elgammal; Kevin E. Murray; Vaughn Betz (FPT, 2020)

From TensorFlow Graphs to LUTs and Wires: Automated Sparse and Physically Aware CNN Hardware Generation. - Mathew Hall; Vaughn Betz (FPT, 2020)

SymbiFlow and VPR: An Open-Source Design Flow for Commercial and Novel FPGAs. - Kevin E. Murray; Mohamed A. Elgammal; Vaughn Betz; Tim Ansell; Keith Rothman; Alessandro Comodi (IEEE Micro, 2020)

Feel Free to Interrupt: Safe Task Stopping to Enable FPGA Checkpointing and Context Switching. - Sameh Attia; Vaughn Betz (ACM Trans. Reconfigurable Technol. Syst., 2020)

FPGA Logic Block Architectures for Efficient Deep Learning Inference. - Mohamed Eldafrawy; Andrew Boutros; Sadegh Yazdanshenas; Vaughn Betz (ACM Trans. Reconfigurable Technol. Syst., 2020)

VTR 8: High-performance CAD and Customizable FPGA Architecture Modelling. - Kevin E. Murray; Oleg Petelin; Sheng Zhong; Jia Min Wang; Mohamed Eldafrawy; Jean-Philippe Legault; Eugene Sha; Aaron Graham; Jean Wu; Matthew J. P. Walker; Hanqing Zeng; Panagiotis Patros; et al. (ACM Trans. Reconfigurable Technol. Syst., 2020)

Optimizing FPGA Logic Circuitry for Variable Voltage Supplies. - Ibrahim Ahmed 001; Linda L. Shen; Vaughn Betz (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Optimizing FPGA Logic Block Architectures for Arithmetic. - Kevin E. Murray; Jason Luu; Matthew J. P. Walker; Conor McCullough; Sen Wang; Safeen Huda; Bo Yan; Charles Chiasson; Kenneth B. Kent; Jason Helge Anderson; Jonathan Rose; Vaughn Betz (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Tensor Slices to the Rescue: Supercharging ML Acceleration on FPGAs. - Aman Arora 001; Samidh Mehta; Vaughn Betz; Lizy K. John (FPGA, 2021)

End-to-End FPGA-based Object Detection Using Pipelined CNN and Non-Maximum Suppression. - Anupreetham Anupreetham; Mohamed Ibrahim; Mathew Hall; Andrew Boutros; Ajay Kuzhively; Abinash Mohanty; Eriko Nurvitadhi; Vaughn Betz; Yu Cao 001; Jae-sun Seo (FPL, 2021)

Koios: A Deep Learning Benchmark Suite for FPGA Architecture and CAD Research. - Aman Arora 001; Andrew Boutros; Daniel Rauch; Aishwarya Rajen; Aatman Borda; Seyed Alireza Damghani; Samidh Mehta; Sangram Kate; Pragnesh Patel; Kenneth B. Kent; Vaughn Betz; Lizy K. John (FPL, 2021)

StateLink: FPGA System Debugging via Flexible Simulation/Hardware Integration. - Sameh Attia; Vaughn Betz (FPT, 2021)

Specializing for Efficiency: Customizing AI Inference Processors on FPGAs. - Andrew Boutros; Eriko Nurvitadhi; Vaughn Betz (ICM, 2021)

Optimizing Interstitial Photodynamic Therapy Planning With Reinforcement Learning-Based Diffuser Placement. - Abdul-Amir Yassine; Lothar Lilge; Vaughn Betz (IEEE Trans. Biomed. Eng., 2021)

RAD-Sim: Rapid Architecture Exploration for Novel Reconfigurable Acceleration Devices. - Andrew Boutros; Eriko Nurvitadhi; Vaughn Betz (FPL, 2022)

Quality & Generality: A Flexible FPGA Re-Clustering Technique to Improve Packing and Placement. - Mohamed A. Elgammal; Vaughn Betz (FPT, 2022)

HPIPE NX: Boosting CNN Inference Acceleration Performance with AI-Optimized FPGAs. - Marius Stan; Mathew Hall; Mohamed Ibrahim; Vaughn Betz (FPT, 2022)

Architecture and Application Co-Design for Beyond-FPGA Reconfigurable Acceleration Devices. - Andrew Boutros; Eriko Nurvitadhi; Vaughn Betz (IEEE Access, 2022)

Stop and Look: A Novel Checkpointing and Debugging Flow for FPGAs. - Sameh Attia; Vaughn Betz (IEEE Trans. Computers, 2022)

RLPlace: Using Reinforcement Learning and Smart Perturbations to Optimize FPGA Placement. - Mohamed A. Elgammal; Kevin E. Murray; Vaughn Betz (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Tensor Slices: FPGA Building Blocks For The Deep Learning Era. - Aman Arora 001; Moinak Ghosh; Samidh Mehta; Vaughn Betz; Lizy K. John (ACM Trans. Reconfigurable Technol. Syst., 2022)

Placement Optimization for NoC-Enhanced FPGAs. - Srivatsan Srinivasan; Andrew Boutros; Fatemehsadat Mahmoudi; Vaughn Betz (FCCM, 2023)

Open-source and FPGAs: Hardware, Software, Both or None? - Dana How; Tim Ansell; Vaughn Betz; Chris Lavin; Ted Speers; Pierre-Emmanuel Gaillardon (FPGA, 2023)

A Whole New World: How to Architect Beyond-FPGA Reconfigurable Acceleration Devices? - Andrew Boutros; Stephen More; Vaughn Betz (FPL, 2023)

VPR-Gym: A Platform for Exploring AI Techniques in FPGA Placement Optimization. - Ruichen Chen; Shengyao Lu; Mohamed A. Elgammal; Peter Chun; Vaughn Betz; Di Niu (FPL, 2023)

Titan 2.0: Enabling Open-Source CAD Evaluation with a Modern Architecture Capture. - Kimia Talaei Khoozani; Arash Ahmadian Dehkordi; Vaughn Betz (FPL, 2023)

Tear Down The Wall: Unified and Efficient Intra-and Inter-Cluster Routing for FPGAs. - Amin Mohaghegh; Vaughn Betz (FPL, 2023)

Into the Third Dimension: Architecture Exploration Tools for 3D Reconfigurable Acceleration Devices. - Andrew Boutros; Fatemehsadat Mahmoudi; Amin Mohaghegh; Stephen More; Vaughn Betz (ICFPT, 2023)

Extending Data Flow Architectures for Convolutional Neural Networks to Multiple FPGAs. - Mohamed Ibrahim; Zhipeng Zhao; Mathew Hall; Vaughn Betz (ICFPT, 2023)

Respect the Difference: Reinforcement Learning for Heterogeneous FPGA Placement. - Fatemehsadat Mahmoudi; Mohamed A. Elgammal; Soheil Gholami Shahrouz; Kevin E. Murray; Vaughn Betz (ICFPT, 2023)

cuSCNN : an Efficient CUDA Implementation of Sparse CNNs. - Mohamed A. Elgammal; Omar Mohamed Awad; Isak Edo Vivancos; Andreas Moshovos; Vaughn Betz (HEART, 2023)

Breaking Boundaries: Optimizing FPGA CAD with Flexible and Multi-threaded Re-Clustering. - Mohamed A. Elgammal; Vaughn Betz (HEART, 2023)

Toward Software-like Debugging for FPGAs via Checkpointing and Transaction-based Co-Simulation. - Sameh Attia; Vaughn Betz (ACM Trans. Reconfigurable Technol. Syst., 2023)

Koios 2.0: Open-Source Deep Learning Benchmarks for FPGA Architecture and CAD Research. - Aman Arora 001; Andrew Boutros; Seyed Alireza Damghani; Karan Mathur; Vedant Mohanty; Tanmay Anand; Mohamed A. Elgammal; Kenneth B. Kent; Vaughn Betz; Lizy K. John (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Stay Flexible: A High-Performance FPGA NPU Overlay for Graph Neural Networks. - Taikun Zhang; Andrew Boutros; Sergey Gribok; Kwadwo Boateng; Vaughn Betz (FCCM, 2024)

H2PIPE: High Throughput CNN Inference on FPGAs with High-Bandwidth Memory. - Mario Doumet; Marius Stan; Mathew Hall; Vaughn Betz (FPL, 2024)

Better Together: Combining Analytical and Annealing Methods for FPGA Placement. - Rachel Selina Rajarathnam; Kate Thurmer; Vaughn Betz; Mahesh A. Iyer; David Z. Pan (FPL, 2024)

The Road Less Traveled: Congestion-Aware NoC Placement and Packet Routing for FPGAs. - Soheil Gholami Shahrouz; Vaughn Betz (FPL, 2024)

A Software-Programmable Neural Processing Unit for Graph Neural Network Inference on FPGAs. - Taikun Zhang; Andrew Boutros; Sergey Gribok; Kwadwo Boateng; Vaughn Betz (FPL, 2024)

Parallel FPGA Routing with On-The-Fly Net Decomposition. - Fahrican Kosar; Mirjana Stojilovic; Vaughn Betz (ICFPT, 2024)

Multiqueue-Based FPGA Routing: Relaxed A* Priority Ordering for Improved Parallelism. - Alexandre Singer; Hang Yan 014; Guozheng Zhang; Mark C. Jeffrey; Mirjana Stojilovic; Vaughn Betz (ICFPT, 2024)

VIPER: A VTR Interface for Placement with Error Resilience. - Kate Thurmer; Vaughn Betz (HEART, 2024)

Field-Programmable Gate Array Architecture for Deep Learning: Survey & Future Directions. - Andrew Boutros; Aman Arora 001; Vaughn Betz (CoRR, 2024)

High Throughput FPGA-Based Object Detection via Algorithm-Hardware Co-Design. - Anupreetham Anupreetham; Mohamed Ibrahim; Mathew Hall; Andrew Boutros; Ajay Kuzhively; Abinash Mohanty; Eriko Nurvitadhi; Vaughn Betz; Yu Cao 001; Jae-Sun Seo (ACM Trans. Reconfigurable Technol. Syst., 2024)

Double Duty: FPGA Architecture to Enable Concurrent LUT and Adder Chain Usage. - Junius Pun; Xilai Dai; Grace Zgheib; Mahesh A. Iyer; Andrew Boutros; Vaughn Betz; Mohamed S. Abdelfattah (CoRR, 2025)

Editorial: A Message from the New Editor-in-Chief. - Vaughn Betz (ACM Trans. Reconfigurable Technol. Syst., 2025)

VTR 9: Open-Source CAD for Fabric and Beyond FPGA Architecture Exploration. - Mohamed A. Elgammal; Amin Mohaghegh; Soheil Gholami Shahrouz; Fatemehsadat Mahmoudi; Fahrican Kosar; Kimia Talaei; Joshua Fife; Daniel Khadivi; Kevin E. Murray; Andrew Boutros; Kenneth B. Kent; Jeffrey B. Goeders; et al. (ACM Trans. Reconfigurable Technol. Syst., 2025)