Mass Production of Silicon MOS-SETs: Can We Live with Nano-Devices' Variability? - Xavier Jehl; B. Roche; Marc Sanquer; B. Voisin; Romain Wacquez; Veeresh Deshpande; Bernard Previtali; Maud Vinet; J. Verduijn; Giuseppe Carlo Tettamanzi; Sven Rogge; D. Kotekar-Patil; et al. (FET, 2011)

Scaling of Trigate nanowire (NW) MOSFETs Down to 5 nm Width: 300 K transition to Single Electron Transistor, challenges and opportunities. - Veeresh Deshpande; Sylvain Barraud; Xavier Jehl; Romain Wacquez; Maud Vinet; Remi Coquand; B. Roche; B. Voisin; François Triozon; C. Vizioz; L. Tosti; Bernard Previtali; et al. (ESSDERC, 2012)

A Ferroelectric Tunnel Junction-based Integrate-and-Fire Neuron. - Paolo Gibertini; Luca Fehlings; Suzanne Lancaster; Quang T. Duong; Thomas Mikolajick; Catherine Dubourdieu; Stefan Slesazeck; Erika Covi; Veeresh Deshpande (ICECS 2022, 2022)

Ferroelectric MirrorBit-Integrated Field-Programmable Memory Array for TCAM, Storage, and In-Memory Computing Applications. - Paritosh Meihar; Rowtu Srinu; Sandip Lashkare; Ajay Kumar Singh; Halid Mulaosmanovic; Veeresh Deshpande; Stefan Dünkel; Sven Beyer; Udayan Ganguly (CoRR, 2023)

Heracles: A HfO2 Ferroelectric Capacitor Compact Model for Efficient Circuit Simulations. - Luca Fehlings; Md Hanif Ali; Paolo Gibertini; Egidio A. Gallicchio; Udayan Ganguly; Veeresh Deshpande; Erika Covi (CoRR, 2024)