Regular Module Generation or Standard Cells: Two Alternative Implementations of a Library of Functional Building Blocks. - Evagelos Katsadas; Zohair Sahraoui; Maryse Wouters; Veerle Derudder; Ivo Bolsens; Paul Six; Hugo De Man (Synthesis for Control Dominated Circuits, 1992)

Optimization Method for Broadband Modem FIR Filter Design using Common Subexpression Elimination. - Robert Pasko; Patrick Schaumont; Veerle Derudder; Daniela Duracková (ISSS, 1997)

A new algorithm for elimination of common subexpressions. - Robert Pasko; Patrick Schaumont; Veerle Derudder; Serge Vernalde; Daniela Duracková (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

80-Mb/s QPSK and 72-Mb/s 64-QAM flexible and scalable digital OFDM transceiver ASICs for wireless local area networks in the 5-GHz band. - Wolfgang Eberle; Veerle Derudder; Geert Vanwijnsberghe; Mario Vergara; Luc Deneire; Liesbet Van der Perre; Marc Engels; Ivo Bolsens; Hugo De Man (IEEE J. Solid State Circuits, 2001)

A 80 Mb/s low-power scalable turbo codec core. - Alexandre Giulietti; Bruno Bougard; Veerle Derudder; Steven Dupont; Jan-Willem Weijers; Liesbet Van der Perre (CICC, 2002)

A performance and complexity comparison of auto-correlation and cross-correlation for OFDM burst synchronization. - Andrew Fort; Jan-Willem Weijers; Veerle Derudder; Wolfgang Eberle; André Bourdoux (ICASSP (2), 2003)

Memory Power Reduction for High-Speed Implementation of Turbo Codes. - Bruno Bougard; Liesbet Van der Perre; F. Maessen; Alexandre Giulietti; Veerle Derudder; Francky Catthoor (J. VLSI Signal Process., 2003)

An approach for real time prototyping of MIMO-OFDM systems. - Maryse Wouters; André Bourdoux; Stefaan De Rore; Sven Janssens; Veerle Derudder (EUSIPCO, 2004)

Subword-Parallel VLIW Architecture Exploration for Multimode Software Defined Radio. - Thomas Schuster; D. N. Bruna; Bruno Bougard; Veerle Derudder; A. Hoffmann; Liesbet Van der Perre (SiPS, 2006)

From MIMO-OFDM Algorithms to a Real-Time Wireless Prototype: A Systematic Matlab-to-Hardware Design Flow. - Jan-Willem Weijers; Veerle Derudder; Sven Janssens; Frederik Petré; André Bourdoux (EURASIP J. Adv. Signal Process., 2006)

Energy-efficient software-defined radio solutions for MIMO-based broadband communication. - Bruno Bougard; André Bourdoux; Frederik Naessens; Miguel Glassee; Veerle Derudder; Liesbet Van der Perre (EUSIPCO, 2007)

An energy efficient 18Gbps LDPC decoding processor for 802.11ad in 28nm CMOS. - Meng Li 012; Jan-Willem Weijers; Veerle Derudder; Ilse Vos; Maxim Rykunov; Steven Dupont; Peter Debacker; Andy Dewilde; Yanxiang Huang; Liesbet Van der Perre; Wim Van Thillo (A-SSCC, 2015)

A 79GHz 2×2 MIMO PMCW radar SoC in 28nm CMOS. - Davide Guermandi; Qixian Shi; Andy Dewilde; Veerle Derudder; Ubaid Ahmad; Annachiara Spagnolo; André Bourdoux; Piet Wambacq; Wim Van Thillo (A-SSCC, 2016)

A 79-GHz 2 × 2 MIMO PMCW Radar SoC in 28-nm CMOS. - Davide Guermandi; Qixian Shi; Andy Dewilde; Veerle Derudder; Ubaid Ahmad; Annachiara Spagnolo; Ilja Ocket; André Bourdoux; Piet Wambacq; Jan Craninckx; Wim Van Thillo (IEEE J. Solid State Circuits, 2017)

A 100 Gbps LDPC Decoder for the IEEE 802.11ay Standard. - Meng Li 012; Veerle Derudder; Claude Desset; Andy Dewilde; André Bourdoux; Yanxiang Huang (ISTC, 2018)

Tb/s Polar Successive Cancellation Decoder 16nm ASIC Implementation. - Altug Süral; E. Göksu Sezer; Ertugrul Kolagasioglu; Veerle Derudder; Kaoutar Bertrand (CoRR, 2020)

High-Speed LDPC Decoders Towards 1 Tb/s. - Meng Li 012; Veerle Derudder; Kaoutar Bertrand; Claude Desset; André Bourdoux (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A 16GHz, $41 text{kHz}_{ text{rms}}$ Frequency Error, Background-Calibrated, Duty-Cycled FMCW Charge-Pump PLL. - Pratap Tumkur Renukaswamy; Kristof Vaesen; Nereo Markulic; Veerle Derudder; Dae-Woong Park; Piet Wambacq; Jan Craninckx (ISSCC, 2023)