An FPGA-based high-speed, low-latency trigger processor for high-energy physics. - Jan de Cuveland; Felix Rettig; Venelin Angelov; Volker Lindenstruth (FPL, 2008)

The educational processor Sweet-16. - Venelin Angelov; Volker Lindenstruth (FPL, 2009)

An FPGA-based High-Speed, Low-Latency Processing System for High-Energy Physics. - Stefan Kirsch 001; Felix Rettig; Dirk Hutter; Jan de Cuveland; Venelin Angelov; Volker Lindenstruth (FPL, 2010)