Optimal facility layout design. - Russell D. Meller; Venkat Narayanan; Pamela H. Vance (Oper. Res. Lett., 1998)

Exploiting error-correcting codes for cache minimum supply voltage reduction while maintaining coverage for radiation-induced soft errors. - Alex Park 002; Venkat Narayanan; Keith A. Bowman; Francois Atallah; Alain Artieri; Sei Seung Yoon; Kendrick Yuen; David Hansquine (CICC, 2014)

Trading-off on-die observability for cache minimum supply voltage reduction in system-on-chip (SoC) processors. - Keith A. Bowman; Alex Park 002; Venkat Narayanan; Francois Atallah; Alain Artieri; Sei Seung Yoon; Kendrick Yuen; David Hansquine (ITC, 2014)