Low Power 10-bit 100 MSPS Segmented Current Steering DAC with > 78 dB SFDR. - Venkatesh Kommangunta; Khuram Shehzad; Deeksha Verma; Kang-Yoon Lee (ICEIC, 2021)

A Design of 44.1 fJ/Conv-Step 12-Bit 80 ms/s Time Interleaved Hybrid Type SAR ADC With Redundancy Capacitor and On-Chip Time-Skew Calibration. - Deeksha Verma; Behnam Samadpoor Rikan; Khuram Shehzad; Sung Jin Kim; Danial Khan; Venkatesh Kommangunta; Syed Adil Ali Shah; YoungGun Pu; Sang-Sun Yoo; Keum-Cheol Hwang; Youngoo Yang; Kang-Yoon Lee (IEEE Access, 2021)

A Design of Low-Power Dynamic Latch Comparator with Adaptive Power Control for12-bit Charge Sharing SAR ADCs. - Ali Azam; Venkatesh Kommangunta; Jung-Hyun Lee; Kang-Yoon Lee (ICEIC, 2022)

Low-Power Light-Weight Binary Phase Shift Keying Demodulator for Magnetic Field Communications. - Venkatesh Kommangunta; Khuram Shehzad; Deeksha Verma; Kang-Yoon Lee (ICEIC, 2022)