Design considerations and implementation of a programmable high-frequency continuous-time filter and variable-gain amplifier in submicrometer CMOS. - Venu Gopinathan; Maurice Tarsia; Davy Choi (IEEE J. Solid State Circuits, 1999)

Background calibration of interleaved analog to digital converters for high-speed communications using interleaved timing recovery techniques. - Oscar E. Agazzi; Venu Gopinathan (ISCAS (2), 2005)

Nyquist ADC Techniques. - Dieter Draxelmayr; Venu Gopinathan (ISSCC, 2007)

A 12.5Gb/s SerDes in 65nm CMOS Using a Baud-Rate ADC with Digital Receiver Equalization and Clock Recovery. - Mike Harwood; Nirmal Warke; Richard Simpson 004; Tom Leslie; Ajith Amerasekera; Sean Batty; Derek Colman; Eugenia Carr; Venu Gopinathan; Steve Hubbins; Peter Hunt; Andy Joy; et al. (ISSCC, 2007)

Unusual Data-Converter Techniques. - Venu Gopinathan; Boris Murmann (ISSCC, 2008)

Parameter Mismatch Estimation in a Parallel Interleaved ADC. - Jaiganesh Balakrishnan; Sthanunathan Ramakrishnan; Venu Gopinathan (ISCAS, 2009)

Data converter breakthroughs in retrospect. - Boris Murmann; Venu Gopinathan (ISSCC, 2011)

Joint sampling-time error and channel skew calibration of time-interleaved ADC in multichannel fiber optic receivers. - Benjamín T. Reyes; Venu Gopinathan; Pablo Sergio Mandolesi; Mario R. Hueda (ISCAS, 2012)