The Role of the Embedded Memories in the Implementation of Artificial Neural Networks. - Rafael Gadea Gironés; Vicente Herrero-Bosch; Angel Sebastiá; Antonio Mocholí Salcedo (FPL, 2000)

On the Implementation of a Margolus Neighborhood Cellular Automata on FPGA. - Joaquín Cerdá; Rafael Gadea Gironés; Vicente Herrero-Bosch; Angel Sebastiá (FPL, 2003)

A new inverse discrete wavelet packet transform architecture. - Guillermo Payá Vayá; Marcos Martínez Peiró; Francisco José Ballester-Merelo; Vicente Herrero-Bosch; Joaquín Cerdá (ISSPA (2), 2003)

A mixed hardware-software approach to flexible Artificial Neural Network training on FPGA. - Ramón José Aliaga; Rafael Gadea Gironés; Ricardo José Colom-Palero; Joaquín Cerdá; Néstor Ferrando; Vicente Herrero-Bosch (ICSAMOS, 2009)

Optimization of Deep Neural Networks Using SoCs with OpenCL. - Rafael Gadea Gironés; Ricardo José Colom-Palero; Vicente Herrero-Bosch (Sensors, 2018)

Design and Validation of an FPGA-Based Configurable Transcranial Doppler Neurofeedback System for Chronic Pain Patients. - Beatriz Rey; Alejandro Rodríguez 004; Enrique Lloréns-Bufort; José Tembl; Miguel Ángel Muñoz; Pedro J. Montoya; Vicente Herrero-Bosch; Jose M. Monzo (Sensors, 2018)

The Event Detection System in the NEXT-White Detector. - Raúl Esteve Bosch; José F. Toledo Alarcón; Vicente Herrero-Bosch; Ander Simón Estévez; Francesc Monrabal Capilla; Vicente Álvarez Puerta; Javier Rodríguez Samaniego; Marc Querol Segura; Francisco José Ballester-Merelo (Sensors, 2021)

Data Compression in the NEXT-100 Data Acquisition System. - Raúl Esteve Bosch; Jorge Rodríguez Ponce; Ander Simón Estévez; José María Benlloch Rodríguez; Vicente Herrero-Bosch; José Francisco Toledo Alarcón (Sensors, 2022)