A novel sampling process and pulse generator for a low distortion digital pulse-width modulator for digital class D amplifiers. - Bah-Hwee Gwee; Joseph Sylvester Chang; Victor Adrian; H. Amir (ISCAS (4), 2003)

A novel combined first and second order Lagrange interpolation sampling process for a digital class D amplifier. - Victor Adrian; Bah-Hwee Gwee; Joseph Sylvester Chang (ISCAS (3), 2004)

A combined interpolatorless interpolation and high accuracy sampling process for digital class D amplifiers. - Victor Adrian; Bah-Hwee Gwee; Joseph Sylvester Chang (ISCAS (6), 2005)

A micropower low-distortion digital class-D amplifier based on an algorithmic pulsewidth modulator. - Bah-Hwee Gwee; Joseph Sylvester Chang; Victor Adrian (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

An acoustic noise suppression system with reduced musical artifacts. - Victor Adrian; Bah-Hwee Gwee; Joseph Sylvester Chang (ISCAS, 2006)

A Low-Voltage Micropower Digital Class-D Amplifier Modulator for Hearing Aids. - Victor Adrian; Joseph S. Chang; Bah-Hwee Gwee (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A Randomized Wrapped-Around Pulse Position Modulation Scheme for DC-DC Converters. - Victor Adrian; Joseph S. Chang; Bah-Hwee Gwee (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

IBM pure application system pattern development and deployment. - Bhadri Madapusi; Valentina Popescu; Victor Adrian; Gloria Yadira Torrealba Melendez (CASCON, 2013)

A Randomized Modulation scheme for filterless digital Class D audio amplifiers. - Victor Adrian; Cui Keer; Bah-Hwee Gwee; Joseph Sylvester Chang (ISCAS, 2014)

Design of a 5 GS/s fully-digital digital-to-analog converter. - Victor Adrian; Yin Sun; Joseph Sylvester Chang (ISCAS, 2014)

A self-oscillating class D audio amplifier with dual voltage and current feedback. - Salma Nashit; Victor Adrian; Cui Keer; Quoc-An Mai; Bah-Hwee Gwee; Joseph S. Chang (ISIC, 2014)

Design of an output stage for high switching frequency DC-DC converters. - Tian-Shun Ng; Yin Sun; Victor Adrian; Bah-Hwee Gwee; Joseph S. Chang (ISIC, 2014)

Design of a variable-delay window ADC for switched-mode DC-DC converters. - Yin Sun; Victor Adrian; Joseph S. Chang (ISCAS, 2015)

A high-efficiency Class-E polar power-amplifier with a novel digitally-controlled output matching network. - Qianqian Liu; Victor Adrian; Bah-Hwee Gwee; Joseph S. Chang (ISIC, 2016)

A class-E RF power amplifier with a novel matching network for high-efficiency dynamic load modulation. - Qianqian Liu; Victor Adrian; Bah-Hwee Gwee; Joseph S. Chang (ISCAS, 2017)

A novel high-rate hybrid window ADC design for monolithic digitally-controlled DC-DC converters. - Yin Sun; Victor Adrian; Joseph S. Chang (ISCAS, 2017)

A low-harmonics low-noise randomized modulation scheme for multi-phase DC-DC converters. - Cui Keer; Victor Adrian; Yin Sun; Bah-Hwee Gwee; Joseph S. Chang (NEWCAS, 2017)

A Circuit for Reducing the Reverse Current in DCM DC-DC Converters. - Yin Sun; Victor Adrian; Tong Ge; Joseph S. Chang (DSP, 2018)

Power-Loss and Design Space Analyses for Fully-Integrated Switched-Mode DC-DC Converters. - Yin Sun; Victor Adrian; Joseph S. Chang (ISCAS, 2018)

A Noise-Shaped Randomized Modulation for Switched-Mode DC-DC Converters. - Cui Keer; Victor Adrian; Bah-Hwee Gwee; Joseph S. Chang (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

An Integrated DC-DC Converter with Novel Asymmetrical Segmented Power-Stages for Sustained High Power-Efficiencies. - Jinhen Lee; Victor Adrian; Joseph S. Chang; Yin Sun; Sun-Yang Tay (ISCAS, 2022)

A Versatile and Accurate Vector-Based Method for Modeling and Analyzing Planar Air-Core Inductors. - Sun-Yang Tay; Victor Adrian; Joseph S. Chang; Jinhen Lee; Bah-Hwee Gwee (ISCAS, 2022)

A 3D-Printed Fourth-Order Stacked Filter for Integrated DC-DC Converters. - Jinhen Lee; Victor Adrian; Sun-Yang Tay; Yanshan Xie; Bah-Hwee Gwee; Joseph S. Chang (ISCAS, 2023)

An Accurate Digital Inductor Current Sensor for Current-Ripple-Based DC-DC Converters. - Yanshan Xie; Victor Adrian; Sun-Yang Tay; Jinhen Lee; Pak Kwong Chan; Joseph S. Chang (ISCAS, 2023)

A Novel Voltage-Controlled Oscillator Linearized by a Resistorless Dynamic-Degeneration Technique. - Jinhen Lee; Victor Adrian; Bah-Hwee Gwee; Joseph Sylvester Chang (APCCAS, 2024)

A 134-μW 50-MHz Quasi-Dynamic Comparator with A Novel Clock-Free Regenerative Latch. - Sun-Yang Tay; Victor Adrian; Rouli Fang; Yanshan Xie; Joseph S. Chang (CICC, 2024)

A Novel Energy-Efficient Continuous-Time Hysteretic VCO-Based Comparator. - Jinhen Lee; Victor Adrian; Kinglouis Steven Tantra; Bah-Hwee Gwee; Joseph S. Chang (ISCAS, 2025)

A Novel High-Accuracy Inductor-Current Estimator for Digitally-Controlled Synchronous DC-DC Buck Converters. - Yanshan Xie; Victor Adrian; Jinhen Lee; Joseph S. Chang (ISCAS, 2025)