Test of Data Retention Faults Sensing the Bit Line with a DFT Bases Differential Amplifier. - Víctor H. Champac; Victor Avendaño; Gordana Jovanovic-Dolecek (LATW, 2001)

Signal integrity loss in bus lines due to open shielding defects. - Victor Avendaño; Víctor H. Champac; Joan Figueras (ETW, 2003)

Signal integrity verification using high speed monitors. - Victor Avendaño; Víctor H. Champac; Joan Figueras (ETS, 2004)

Built-In Sensor for Signal Integrity Faults in Digital Interconnect Signals. - Víctor H. Champac; Victor Avendaño; Joan Figueras (IEEE Trans. Very Large Scale Integr. Syst., 2010)

A design methodology using flip-flops controlled by PVT variation detection. - Alexandro Giron-Allende; Victor Avendaño; Esteban Martinez Guerrero (LASCAS, 2015)

A controllable setup and propagation delay flip-flop design. - Alexandro Giron-Allende; Victor Avendaño; Esteban Martinez Guerrero (LATS, 2015)