Parallel Algorithms for Power Estimation. - Victor Kim; Prithviraj Banerjee (DAC, 1998)

Fine-Grained Parallel VLSI Synthesis for Commercial CAD on a Network of Workstations. - Victor Kim; Prithviraj Banerjee; Kaushik De (ICPP, 2000)

A Behavioral Synthesis Tool for Exploiting Fine Grain Parallelism in FPGAs. - Prithviraj Banerjee; Malay Haldar; Anshuman Nayak; Victor Kim; Debabrata Bagchi; Satrajit Pal; Nikhil Tripathi (IWDC, 2002)

Automatic Conversion of Floating Point MATLAB Programs into Fixed Point FPGA Based Hardware Design. - Prithviraj Banerjee; Debabrata Bagchi; Malay Haldar; Anshuman Nayak; Victor Kim; R. Uribe (FCCM, 2003)

Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs. - Prithviraj Banerjee; Vikram Saxena; Juan Ramon Uribe; Malay Haldar; Anshuman Nayak; Victor Kim; Debabrata Bagchi; Satrajit Pal; Nikhil Tripathi; Robert Anderson (FPGA, 2003)

Overview of a compiler for synthesizing MATLAB programs onto FPGAs. - Prithviraj Banerjee; Malay Haldar; Anshuman Nayak; Victor Kim; Vikram Saxena; Steven Parkes; Debabrata Bagchi; Satrajit Pal; Nikhil Tripathi; David Zaretsky; Robert Anderson; Juan Ramon Uribe (IEEE Trans. Very Large Scale Integr. Syst., 2004)