Verifying timing properties of concurrent algorithms. - Victor Luchangco; Ekrem Söylemez; Stephen J. Garland; Nancy A. Lynch (FORTE, 1994)

Computer-Assisted Verification of an Algorithm for Concurrent Timestamps. - Tsvetomir P. Petrov; Anna Pogosyants; Stephen J. Garland; Victor Luchangco; Nancy A. Lynch (FORTE, 1996)

Precedence-Based Memory Models. - Victor Luchangco (WDAG, 1997)

Computation-Centric Memory Models. - Matteo Frigo; Victor Luchangco (SPAA, 1998)

Eventually-Serializable Data Services. - Alan D. Fekete; David Gupta; Victor Luchangco; Nancy A. Lynch; Alexander A. Shvartsman (Theor. Comput. Sci., 1999)

On Formal Modeling of Agent Computations. - Tadashi Araragi; Paul C. Attie; Idit Keidar; Kiyoshi Kogure; Victor Luchangco; Nancy A. Lynch; Ken Mano (FAABS, 2000)

Modeling weakly consistent memories with locks. - Victor Luchangco (SPAA, 2001)

Dynamic-sized lock-free data structures. - Maurice Herlihy; Victor Luchangco; Paul A. Martin; Mark Moir (PODC, 2002)

The Repeat Offender Problem: A Mechanism for Supporting Dynamic-Sized, Lock-Free Data Structures. - Maurice Herlihy; Victor Luchangco; Mark Moir (DISC, 2002)

Obstruction-Free Synchronization: Double-Ended Queues as an Example. - Maurice Herlihy; Victor Luchangco; Mark Moir (ICDCS, 2003)

Software transactional memory for dynamic-sized data structures. - Maurice Herlihy; Victor Luchangco; Mark Moir; William N. Scherer III (PODC, 2003)

Nonblocking k-compare-single-swap. - Victor Luchangco; Mark Moir; Nir Shavit (SPAA, 2003)

On the Uncontended Complexity of Consensus. - Victor Luchangco; Mark Moir; Nir Shavit (DISC, 2003)

Space and Time Adaptive Non-blocking Algorithms. - Maurice Herlihy; Victor Luchangco; Mark Moir (CATS, 2003)

Formal Verification of a Practical Lock-Free Queue Algorithm. - Simon Doherty; Lindsay Groves; Victor Luchangco; Mark Moir (FORTE, 2004)

Object-oriented units of measurement. - Eric E. Allen; David Chase; Victor Luchangco; Jan-Willem Maessen; Guy L. Steele Jr. (OOPSLA, 2004)

Bringing practical lock-free synchronization to 64-bit applications. - Simon Doherty; Maurice Herlihy; Victor Luchangco; Mark Moir (PODC, 2004)

DCAS is not a silver bullet for nonblocking algorithm design. - Simon Doherty; David Detlefs; Lindsay Groves; Christine H. Flood; Victor Luchangco; Paul Alan Martin; Mark Moir; Nir Shavit; Guy L. Steele Jr. (SPAA, 2004)

Obstruction-Free Algorithms Can Be Practically Wait-Free. - Faith Ellen Fich; Victor Luchangco; Mark Moir; Nir Shavit (DISC, 2005)

Obstruction-Free Step Complexity: Lock-Free DCAS as an Example. - Faith Ellen Fich; Victor Luchangco; Mark Moir; Nir Shavit (DISC, 2005)

Nonblocking memory management support for dynamic-sized data structures. - Maurice Herlihy; Victor Luchangco; Paul A. Martin; Mark Moir (ACM Trans. Comput. Syst., 2005)

Hybrid transactional memory. - Peter Damron; Alexandra Fedorova; Yossi Lev; Victor Luchangco; Mark Moir; Daniel Nussbaum (ASPLOS, 2006)

Formal Verification of a Lazy Concurrent List-Based Set Algorithm. - Robert Colvin; Lindsay Groves; Victor Luchangco; Mark Moir (CAV, 2006)

A Hierarchical CLH Queue Lock. - Victor Luchangco; Daniel Nussbaum; Nir Shavit (Euro-Par, 2006)

A flexible framework for implementing software transactional memory. - Maurice Herlihy; Victor Luchangco; Mark Moir (OOPSLA, 2006)

SNZI: scalable NonZero indicators. - Faith Ellen; Yossi Lev; Victor Luchangco; Mark Moir (PODC, 2007)

Modular multiple dispatch with multiple inheritance. - Eric E. Allen; J. J. Hallett; Victor Luchangco; Sukyoung Ryu; Guy L. Steele Jr. (SAC, 2007)

A Simple Optimistic Skiplist Algorithm. - Maurice Herlihy; Yossi Lev; Victor Luchangco; Nir Shavit (SIROCCO, 2007)

A Lazy Concurrent List-Based Set Algorithm. - Steve Heller; Maurice Herlihy; Victor Luchangco; Mark Moir; William N. Scherer III; Nir Shavit (Parallel Process. Lett., 2007)

Efficient Large Almost Wait-Free Single-Writer Multireader Atomic Registers. - Andrew Lutomirski; Victor Luchangco (OPODIS, 2008)

Against lock-based semantics for transactional memory. - Victor Luchangco (SPAA, 2008)

Distributed computing and the multicore revolution. - Maurice Herlihy; Victor Luchangco (SIGACT News, 2008)

Scalable reader-writer locks. - Yossi Lev; Victor Luchangco; Marek Olszewski (SPAA, 2009)

Nonblocking k -Compare-Single-Swap. - Victor Luchangco; Mark Moir; Nir Shavit (Theory Comput. Syst., 2009)

You are not alone: breaking transaction isolation. - Victor Luchangco; Virendra J. Marathe (IWMSE@ICSE, 2010)

Integrating coercion with subtyping and multiple dispatch. - J. J. Hallett; Victor Luchangco; Sukyoung Ryu; Guy L. Steele Jr. (Sci. Comput. Program., 2010)

Transactional memory, linking theory and practice. - Srivatsan Ravi; Vincent Gramoli; Victor Luchangco (SIGACT News, 2010)

Type checking modular multiple dispatch with parametric polymorphism and multiple inheritance. - Eric E. Allen; Justin Hilburn; Scott Kilpatrick; Victor Luchangco; Sukyoung Ryu; David Chase; Guy L. Steele Jr. (OOPSLA, 2011)

Transaction communicators: enabling cooperation among concurrent transactions. - Victor Luchangco; Virendra J. Marathe (PPoPP, 2011)

Fortress (Sun HPCS Language). - Guy L. Steele Jr.; Eric E. Allen; David Chase; Christine H. Flood; Victor Luchangco; Jan-Willem Maessen; Sukyoung Ryu (Encyclopedia of Parallel Computing, 2011)

A Framework for Formally Verifying Software Transactional Memory Algorithms. - Mohsen Lesani; Victor Luchangco; Mark Moir (CONCUR, 2012)

Fine-Grained Function Visibility for Multiple Dispatch with Multiple Inheritance. - Jieung Kim; Sukyoung Ryu; Victor Luchangco; Guy L. Steele Jr. (APLAS, 2013)

Constrained Data-Driven Parallelism. - Tim Harris 001; Yossi Lev; Victor Luchangco; Virendra J. Marathe; Mark Moir (HotPar, 2013)

Mindicators: A Scalable Approach to Quiescence. - Yujie Liu 003; Victor Luchangco; Michael F. Spear (ICDCS, 2013)

NUMA-aware reader-writer locks. - Irina Calciu; David Dice; Yossi Lev; Victor Luchangco; Virendra J. Marathe; Nir Shavit (PPoPP, 2013)

Using hardware transactional memory to correct and simplify and readers-writer lock algorithm. - Dave Dice; Yossi Lev; Yujie Liu 003; Victor Luchangco; Mark Moir (PPoPP, 2013)

Towards formally specifying and verifying transactional memory. - Simon Doherty; Lindsay Groves; Victor Luchangco; Mark Moir (Formal Aspects Comput., 2013)

Towards Transactional Memory for OpenMP. - Michael Wong; Eduard Ayguadé; Justin Gottschlich; Victor Luchangco; Bronis R. de Supinski; Barna L. Bihari (IWOMP, 2014)

Foreword: Parallelism in Algorithms and Architectures. - Geppino Pucci; Victor Luchangco; Rajmohan Rajaraman (Theory Comput. Syst., 2014)

Investigating the Performance of Hardware Transactions on a Multi-Socket Machine. - Trevor Brown 001; Alex Kogan; Yossi Lev; Victor Luchangco (SPAA, 2016)

Extending Transactional Memory with Atomic Deferral. - Tingzhe Zhou; Victor Luchangco; Michael F. Spear (OPODIS, 2017)

Hand-Over-Hand Transactions with Precise Memory Reclamation. - Tingzhe Zhou; Victor Luchangco; Michael F. Spear (SPAA, 2017)

Brief Announcement: Extending Transactional Memory with Atomic Deferral. - Tingzhe Zhou; Victor Luchangco; Michael F. Spear (SPAA, 2017)

Saying What You Mean. - Victor Luchangco (ApPLIED@PODC, 2018)

Towards a Verified Model of the Algorand Consensus Protocol in Coq. - Musab A. Alturki; Jing Chen; Victor Luchangco; Brandon M. Moore; Karl Palmskog; Lucas Peña; Grigore Rosu (FM Workshops (1), 2019)

Theory Meets Practice in the Algorand Blockchain (Invited Talk). - Victor Luchangco (OPODIS, 2022)

BQ: A Lock-Free Queue with Batching. - Gal Milman-Sela; Alex Kogan; Yossi Lev; Victor Luchangco; Erez Petrank (ACM Trans. Parallel Comput., 2022)