Variability aware hierarchical implementation of big chips. - Vidyamani Parkhe (ISPD, 2013)

On Timing Closure: Buffer Insertion for Hold-Violation Removal. - Pei-Ci Wu; Martin D. F. Wong; Ivailo Nedelchev; Sarvesh Bhardwaj; Vidyamani Parkhe (DAC, 2014)