CCII+ current conveyor based BIC monitor for IDDQ testing of complex CMOS circuits. - Viera Stopjaková; Hans A. R. Manhaeve (ED&TC, 1997)

On-Chip Transient Current Monitor for Testing of Low Voltage CMOS IC. - Viera Stopjaková; Hans A. R. Manhaeve; M. Sidiropulos (DATE, 1999)

I-V Fast IDDQ Current Sensor for On-Line Mixed-Signal/Analog Test. - Martin Margala; Srdjan Dragic; Ahmed El-Abasiry; Samuel Ekpe; Viera Stopjaková (IOLTW, 2000)

Neural Networks-Based Parametric Testing of Analog IC. - Viera Stopjaková; Daniel Micusík; Lubica Benusková; Martin Margala (DFT, 2002)

Application of Feed-forward Artificial Neural Networks to the Identification of Defective Analog Integrated Circuits. - Daniel Micusík; Viera Stopjaková; Lubica Benusková (Neural Comput. Appl., 2002)

Classification of Defective Analog Integrated Circuits Using Artificial Neural Networks. - Viera Stopjaková; Pavol Malosek; Daniel Micusík; Marek Matej; Martin Margala (J. Electron. Test., 2004)

Defect detection in analog and mixed circuits by neural networks using wavelet analysis. - Viera Stopjaková; Pavol Malosek; Marek Matej; Vladislav Nagy; Martin Margala (IEEE Trans. Reliab., 2005)

PCA Data Preprocessing for Neural Network-based Detection of Parametric Defects in Analog IC. - Pavol Malosek; Viera Stopjaková (DDECS, 2006)

New Current Monitor Using Auto Zero Voltage Comparator for IDD Testing of Mixed-signal Circuits. - Vladislav Nagy; Viera Stopjaková (DDECS, 2006)

DefSim: CMOS Defects on Chip for Research and Education. - Witold A. Pleskacz; Tomasz Borejko; Andrzej Walkanis; Viera Stopjaková; Artur Jutman; Raimund Ubar (LATW, 2006)

Clockless Implementation of LEON2 for Low-Power Applications. - Martin Simlastík; Viera Stopjaková; Libor Majer; Peter Malík (DDECS, 2007)

Built-In Current Monitor for IDDQ Testing in CMOS 90 nm Technology. - Marcin J. Beresinski; Tomasz Borejko; Witold A. Pleskacz; Viera Stopjaková (DDECS, 2008)

Experimental Analog Circuit for Parametric Test Methods Efficiency Evaluation. - Juraj Brenkus; Viera Stopjaková; Jozef Mihálov (DDECS, 2008)

On-chip Integration of Magnetic Force Sensing Current Monitors. - Martin Donoval; Martin Daricek; Viera Stopjaková; Juraj Marek (DDECS, 2008)

Portable Measurement Equipment for Continuous Biomedical Monitoring using Microelectrodes. - Libor Majer; Viera Stopjaková (DDECS, 2008)

On-chip supply current monitoring units using magnetic force sensing. - Martin Donoval; Martin Daricek; Viera Stopjaková; Juraj Marek (ICECS, 2008)

Automated Synchronous-to-Asynchronous Circuits Conversion: A Survey. - Martin Simlastík; Viera Stopjaková (PATMOS, 2008)

DefSim: A Remote Laboratory for Studying Physical Defects in CMOS Digital Circuits. - Witold A. Pleskacz; Viera Stopjaková; Tomasz Borejko; Artur Jutman; Andrzej Walkanis (IEEE Trans. Ind. Electron., 2008)

Comparison of different test strategies on a mixed-signal circuit. - Juraj Brenkus; Viera Stopjaková; Ronny Vanhooren; Anton Chichkov (DDECS, 2009)

Power devices current monitoring using horizontal and vertical magnetic force sensor. - Martin Donoval; Martin Daricek; Juraj Marek; Viera Stopjaková (DDECS, 2009)

Vertical and horizontal magnetic force sensor and application of sensor in power devices. - Martin Donoval; Martin Daricek; Juraj Marek; Viera Stopjaková (ECCTD, 2009)

The novel approach to wideband RFIC receivers in standard CMOS process. - Libor Majer; Viera Stopjaková (DDECS, 2010)

Current Sensing Completion Detection in deep sub-micron technologies. - Lukás Nagy; Viera Stopjaková (DDECS, 2010)

Increasing the efficiency of analog OBIST using on-chip compensation of technology variations. - Daniel Arbet; Juraj Brenkus; Gábor Gyepes; Viera Stopjaková (DDECS, 2011)

Comparison of iddt test efficiency in covering opens in SRAMs realised in two different technologies. - Gábor Gyepes; Juraj Brenkus; Daniel Arbet; Viera Stopjaková (DDECS, 2011)

Current sensing methodology for completion detection in self-timed systems. - Lukás Nagy; Viera Stopjaková (DDECS, 2011)

Alternative methods for heart-rate sensing. - Erik Vavrinsky; Martin Daricek; Martin Donoval; Peter Telek; Viera Stopjaková; Vladimir Tvarozek (ISABEL, 2011)

OBIST strategy versus parametric test - Efficiency in covering catastrophic faults in active analog filters. - Daniel Arbet; Gábor Gyepes; Juraj Brenkus; Viera Stopjaková (DDECS, 2012)

Application of IDDT test towards increasing SRAM reliability in nanometer technologies. - Gábor Gyepes; Daniel Arbet; Juraj Brenkus; Viera Stopjaková (DDECS, 2012)

Current sensing completion detection in dual-rail asynchronous systems. - Lukás Nagy; Viera Stopjaková (DDECS, 2012)

Efficiency of oscillation-based BIST in 90nm CMOS active analog filters. - Daniel Arbet; Gabriel Nagy; Viera Stopjaková; Gábor Gyepes (DDECS, 2013)

Numerical method for DC fault analysis simplification and simulation time reduction. - Juraj Brenkus; Viera Stopjaková; Gábor Gyepes (DDECS, 2013)

Digital methods of offset compensation in 90nm CMOS operational amplifiers. - Gabriel Nagy; Daniel Arbet; Viera Stopjaková (DDECS, 2013)

Completion detection in dual-rail asynchronous systems by current-sensing. - Lukás Nagy; Viera Stopjaková; Roman Záluský (Microelectron. J., 2013)

A novel impedance calculation method and its time efficiency evaluation. - Juraj Brenkus; Viera Stopjaková; Daniel Arbet; Gábor Gyepes; Libor Majer (DDECS, 2014)

An approach towards selection of the oscillation frequency for oscillation test of analog ICs. - Martin Kovác; Daniel Arbet; Gabriel Nagy; Viera Stopjaková (DDECS, 2014)

Novel architecture of a digital neuron for FFNN employing special multiplication. - Roman Záluský; Daniela Duracková; Viera Stopjaková; Lukás Nagy; Vladimír Sedlák (ECAI, 2014)

Current Sensing Completion Detection in Single-Rail Asynchronous Systems. - Lukás Nagy; Viera Stopjaková; Juraj Brenkus (Comput. Informatics, 2014)

A new IDDT test approach and its efficiency in covering resistive opens in SRAM arrays. - Gábor Gyepes; Viera Stopjaková; Daniel Arbet; Libor Majer; Juraj Brenkus (Microprocess. Microsystems, 2014)

BIST architecture for oscillation test of analog ICs and investigation of test hardware influence. - Daniel Arbet; Viera Stopjaková; Juraj Brenkus; Gábor Gyepes; Martin Kovác; Libor Majer (Microelectron. Reliab., 2014)

Fully Differential Difference Amplifier for Low-Noise Applications. - Daniel Arbet; Gabriel Nagy; Martin Kovác; Viera Stopjaková (DDECS, 2015)

Design of In AlN/GaN Heterostructure-Based Logic Cells. - Lukás Nagy; Viera Stopjaková; Alexander Satka (DDECS, 2015)

Readout interface for capacitive MEMS microphone in CMOS technology. - Daniel Arbet; Gabriel Nagy; Martin Kovác; Viera Stopjaková; Lukás Nagy (MIXDES, 2015)

Investigation of the optimum oscillation frequency value towards increasing the efficiency of OBIST approach. - Daniel Arbet; Viera Stopjaková; Martin Kovác (Microelectron. Reliab., 2015)

Low-voltage bulk-driven variable gain amplifier in 130 nm CMOS technology. - Daniel Arbet; Martin Kovác; Lukás Nagy; Viera Stopjaková; Juraj Brenkus (DDECS, 2016)

Impedance calculation based method for AC fault analysis of mixed-signal circuits. - Juraj Brenkus; Viera Stopjaková; Lukás Nagy; Daniel Arbet (DDECS, 2016)

Comparison of gate-driven and bulk-driven current mirror topologies. - Matej Rakus; Viera Stopjaková; Daniel Arbet (DDECS, 2016)

CMOS variable-gain amplifier for low-frequency applications. - Michal Sovcik; Michal Matuska; Daniel Arbet; Viera Stopjaková (DDECS, 2016)

Improved Task Scheduler for Dual-Core Real-Time Systems. - Lukás Kohútka; Viera Stopjaková (DSD, 2016)

Variable-gain amplifier for ultra-low voltage applications in 130nm CMOS technology. - Daniel Arbet; Martin Kovác; Lukás Nagy; Viera Stopjaková; Michal Sovcik (MIPRO, 2016)

Task scheduler for dual-core real-time systems. - Lukás Kohútka; Viera Stopjaková (MIXDES, 2016)

Fully Differential Difference Amplifier for Low-Noise and Low-Distortion Applications. - Daniel Arbet; Gabriel Nagy; Martin Kovác; Viera Stopjaková (J. Circuits Syst. Comput., 2016)

Low-power bulk-driven rail-to-rail comparator in 130 nm CMOS technology. - Lukás Nagy; Daniel Arbet; Martin Kovác; Viera Stopjaková (AFRICON, 2017)

Rocket Queue: New data sorting architecture for real-time systems. - Lukás Kohútka; Viera Stopjaková (DDECS, 2017)

Ultra-low-voltage driver for large load capacitance in 130nm CMOS technology. - Michal Sovcik; Martin Kovác; Daniel Arbet; Viera Stopjaková (DDECS, 2017)

A new efficient sorting architecture for real-time systems. - Lukás Kohútka; Viera Stopjaková (MECO, 2017)

130 nm CMOS Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. - Daniel Arbet; Viera Stopjaková; Martin Kovác; Lukás Nagy; Matej Rakus; Michal Sovcik (J. Circuits Syst. Comput., 2017)

A Novel Method Towards Time-Efficient Fault Analysis of Analog and Mixed-Signal Circuits. - Juraj Brenkus; Viera Stopjaková; Viera Cernanová; Daniel Arbet; Lukás Nagy; Vladimír Sedlák (J. Circuits Syst. Comput., 2017)

Foreword. - Andreas Steininger; Adam Pawlak; Viera Stopjaková (J. Circuits Syst. Comput., 2017)

Two-Stage Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. - Daniel Arbet; Martin Kovác; Lukás Nagy; Viera Stopjaková; Michal Sovcik (DDECS, 2018)

Heap Queue: A Novel Efficient Hardware Architecture of MIN/MAX Queues for Real-Time Systems. - Lukás Kohútka; Viera Stopjaková (DDECS, 2018)

Design and Performance Analysis of Ultra-Low Voltage Rail-to-Rail Comparator in 130 nm CMOS Technology. - Lukás Nagy; Daniel Arbet; Martin Kovác; Miroslav Potocný; Viera Stopjaková (DDECS, 2018)

Self Vth-Compensating CMOS On-Chip Rectifier for Inductively Powered Implantable Medical Devices. - Miroslav Potocný; Viera Stopjaková; Martin Kovác (DDECS, 2018)

A Novel Hardware-Accelerated Priority Queue for Real-Time Systems. - Lukás Kohútka; Lukás Nagy; Viera Stopjaková (DSD, 2018)

A novel hardware-accelerated real-time task scheduler based on robust earliest deadline algorithm. - Lukás Kohútka; Viera Stopjaková (DTIS, 2018)

Bulk-driven fully differential difference amplifier for ultra-low voltage applications. - Daniel Arbet; Martin Kovác; Viera Stopjaková; Miroslav Potocný (MIPRO, 2018)

Reliable real-time task scheduler based on Rocket Queue architecture. - Lukás Kohútka; Viera Stopjaková (Microelectron. Reliab., 2018)

Ultra-low-voltage boosted driver for self-powered systems. - Michal Sovcik; Martin Kovác; Daniel Arbet; Viera Stopjaková; Miroslav Potocný (Microelectron. Reliab., 2018)

Performance Analysis Of Ultra Low-Voltage Rail-to-Rail Comparator In 130 nm CMOS Technology. - Lukás Nagy; Daniel Arbet; Martin Kovác; Miroslav Potocný; Michal Sovcik; Viera Stopjaková (AFRICON, 2019)

Low Latency Hardware-Accelerated Dynamic Memory Manager for Hard Real-Time and Mixed-Criticality Systems. - Lukás Kohútka; Lukás Nagy; Viera Stopjaková (DDECS, 2019)

Investigation of Low-Voltage, Sub-threshold Charge Pump with Parasitics Aware Design Methodology. - Martin Kovác; Daniel Arbet; Viera Stopjaková; Michal Sovcik; Lukás Nagy (DDECS, 2019)

Ultra Low-Voltage Rail-to-Rail Comparator Design in 130 nm CMOS Technology. - Lukás Nagy; Daniel Arbet; Martin Kovác; Miroslav Potocný; Viera Stopjaková (DDECS, 2019)

High side power MOSFET switch driver for a low-power AC/DC converter. - Miroslav Potocný; Juraj Brenkus; Viera Stopjaková (DDECS, 2019)

International Symposium on Design and Diagnostics of Electronic Circuits and Systems. - Zoran Stamenkovic; Alberto Bosio; György Cserey; Ondrej Novák; Witold A. Pleskacz; Lukás Sekanina; Andreas Steininger; Goran Stojanovic; Viera Stopjaková (ITC, 2019)

A New Hardware-Accelerated Scheduler for Soft Real-Time Tasks. - Lukás Kohútka; Viera Stopjaková (MECO, 2019)

Voltage-to-Frequency Converter for Ultra-Low-Voltage Applications. - Daniel Arbet; Martin Kovác; Viera Stopjaková; Miroslav Potocný (MIPRO, 2019)

Towards Energy-autonomous Integrated Systems Through Ultra-low Voltage Analog IC Design. - Viera Stopjaková; Martin Kovác; Daniel Arbet; Lukás Nagy (MIXDES, 2019)

A Novel On-Chip Task Scheduler for Mixed-Criticality Real-Time Systems. - Lukás Kohútka; Lukás Nagy; Viera Stopjaková (J. Circuits Syst. Comput., 2019)

Dynamic Properties Of Ultra Low-Voltage Rail-to-Rail Comparator Designed In 130 nm CMOS Technology. - Lukás Nagy; Daniel Arbet; Martin Kovác; Miroslav Potocný; Michal Sovcik; Viera Stopjaková (DDECS, 2020)

RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems. - Lukás Kohútka; Lukás Nagy; Viera Stopjaková (MECO, 2020)

Multi-Topology DC-DC Converter for Low-Voltage Energy Harvesting Systems. - Martin Kovác; Daniel Arbet; Lukás Nagy; Michal Sovcik; Viera Stopjaková (MIPRO, 2020)

ASIC Architecture and Implementation of RED Scheduler for Mixed-Criticality Real-Time Systems. - Lukás Kohútka; Viera Stopjaková (MIXDES, 2020)

Low-Leakage ESD Structures in 130nm CMOS Technology. - Lukás Nagy; Ales Chvála; Viera Stopjaková (RADIOELEKTRONIKA, 2020)

Development of test equipment for evaluation of low-power AC/DC converter ASIC. - Miroslav Potocný; Michal Sovcík; Viera Stopjaková (RADIOELEKTRONIKA, 2020)

Autonomous On-Chip Digital Calibration for Analog ICs in Nanotechnologies. - Michal Sovcík; Viera Stopjaková; Daniel Arbet; Miroslav Potocný (RADIOELEKTRONIKA, 2020)

Novel efficient on-chip task scheduler for multi-core hard real-time systems. - Lukás Kohútka; Viera Stopjaková (Microprocess. Microsystems, 2020)

EKV Model for Bulk-Driven Circuit Design Using gmb/ID Method. - Lukás Nagy; Daniel Arbet; Martin Kovác; Miroslav Potocný; Róbert Ondica; Viera Stopjaková (AFRICON, 2021)

Enhanced Reliability of Fully Differential Difference Amplifier Through On-chip Digital Calibration. - David Maljar; Michal Sovcík; Daniel Arbet; Viera Stopjaková (DDECS, 2021)

EKV MOS Transistor Model For Ultra Low-Voltage Bulk-Driven IC Design. - Lukás Nagy; Daniel Arbet; Martin Kovác; Miroslav Potocný; Michal Sovcik; Viera Stopjaková (DDECS, 2021)

Fully On-Chip Low-Drop Regulator for Low-Power Applications. - Daniel Arbet; Miroslav Potocný; Martin Kovác; Lukás Nagy; Viera Stopjaková (MIPRO, 2021)

Investigation of Inductor-based Fully On-chip Boost Converter. - Róbert Ondica; Daniel Arbet; Martin Kovác; Viera Stopjaková (MIXDES, 2021)

Maximum Power Point Tracking Circuit for an Energy Harvester in 130 nm CMOS Technology. - Adam Hudec; Lukás Nagy; Martin Kovác; Viera Stopjaková (CoRR, 2021)

Low-Voltage DC-DC Converter for IoT and On-Chip Energy Harvester Applications. - Miroslav Potocný; Martin Kovác; Daniel Arbet; Michal Sovcik; Lukás Nagy; Viera Stopjaková; Richard Ravasz (Sensors, 2021)

The Concept of Advanced Multi-Sensor Monitoring of Human Stress. - Erik Vavrinsky; Viera Stopjaková; Martin Kopani; Helena Kosnácová (Sensors, 2021)

Autocalibration Approach for Improving Robustness of Analog ICs. - David Maljar; Daniel Arbet; Martin Kovác; Róbert Ondica; Viera Stopjaková (DDECS, 2022)

On-Chip Current Sensing Approaches for DC-DC Converters. - Richard Ravasz; Adam Hudec; Daniel Arbet; Viera Stopjaková (DDECS, 2022)

Histogram memory reduction in FPGA gradient edge detectors. - Miroslav Hagara; Oldrich Ondrácek; Viera Stopjaková; Radovan Stojanovic (MECO, 2022)

High Power Supply Rejection LDO Regulator for Switching Applications. - Daniel Arbet; Martin Kovác; David Maljas; Lukás Nagy; Viera Stopjaková (MIPRO, 2022)

Low-Power Rail-to-Rail Comparator in 130 nm CMOS Technology. - Lukás Nagy; Daniel Arbet; Martin Kovác; Miroslav Potocný; Michal Sovcik; Viera Stopjaková (RADIOELEKTRONIKA, 2022)

0.5 V, nW-Range Universal Filter Based on Multiple-Input Transconductor for Biosignals Processing. - Fabian Khateb; Montree Kumngern; Tomasz Kulej; Meysam Akbari; Viera Stopjaková (Sensors, 2022)

A 0.3-V High Linear Rail-to-Rail Bulk-Driven OTA in 0.13 μm CMOS. - Tomasz Kulej; Fabian Khateb; Daniel Arbet; Viera Stopjaková (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Design of Ultra-Low Power Comparator in 65 NM CMOS Technology with Rail-to-Rail Input Range. - Lukás Nagy; Michal Sovcik; Viera Stopjaková (AFRICON, 2023)

Low-Power CMOS Frequency Comparator. - Martin Kovác; Miroslav Potocný; Daniel Arbet; Róbert Ondica; Richard Ravasz; Viera Stopjaková (MIPRO, 2023)

Design of the Slope Detection Circuit for On-Chip Current Sensing. - Richard Ravasz; David Maljar; Daniel Arbet; Viera Stopjaková; Peter Kubinec (MIXDES, 2023)

0.3-V, 357.4-nW Voltage-Mode First-Order Analog Filter Using a Multiple-Input VDDDA. - Fabian Khateb; Montree Kumngern; Tomasz Kulej; Viera Stopjaková; Costas Psychalinos (IEEE Access, 2023)

Constant Voltage Maximum Power Point Tracking Method for Fully Integrated Solar-Powered Energy Harvester. - Adam Hudec; Róbert Ondica; Richard Ravasz; Viera Stopjaková (DDECS, 2024)

Tunable Voltage Reference circuit in a standard 65nm CMOS technology. - Róbert Ondica; David Maljar; Miroslav Potocný; Daniel Arbet; Viera Stopjaková (DDECS, 2025)

Development of slope detection ASIC for on-chip current sensing in voltage converters. - Richard Ravasz; Viera Stopjaková; David Maljar; Daniel Arbet; Lukás Nagy; Martin Kovác (Integr., 2025)